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7e501cf4c3
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
llvm-svn: 186280
200 lines
5.5 KiB
LLVM
200 lines
5.5 KiB
LLVM
; Test sign extensions from a halfword to an i64.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Test register extension, starting with an i32.
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define i64 @f1(i64 %a) {
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; CHECK-LABEL: f1:
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; CHECK: lghr %r2, %r2
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; CHECK: br %r14
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%half = trunc i64 %a to i16
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; ...and again with an i64.
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define i64 @f2(i32 %a) {
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; CHECK-LABEL: f2:
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; CHECK: lghr %r2, %r2
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; CHECK: br %r14
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%half = trunc i32 %a to i16
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; Check LGH with no displacement.
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define i64 @f3(i16 *%src) {
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; CHECK-LABEL: f3:
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; CHECK: lgh %r2, 0(%r2)
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; CHECK: br %r14
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%half = load i16 *%src
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; Check the high end of the LGH range.
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define i64 @f4(i16 *%src) {
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; CHECK-LABEL: f4:
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; CHECK: lgh %r2, 524286(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%src, i64 262143
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%half = load i16 *%ptr
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; Check the next halfword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f5(i16 *%src) {
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; CHECK-LABEL: f5:
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; CHECK: agfi %r2, 524288
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; CHECK: lgh %r2, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%src, i64 262144
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%half = load i16 *%ptr
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; Check the high end of the negative LGH range.
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define i64 @f6(i16 *%src) {
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; CHECK-LABEL: f6:
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; CHECK: lgh %r2, -2(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%src, i64 -1
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%half = load i16 *%ptr
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; Check the low end of the LGH range.
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define i64 @f7(i16 *%src) {
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; CHECK-LABEL: f7:
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; CHECK: lgh %r2, -524288(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%src, i64 -262144
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%half = load i16 *%ptr
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; Check the next halfword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f8(i16 *%src) {
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; CHECK-LABEL: f8:
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; CHECK: agfi %r2, -524290
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; CHECK: lgh %r2, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%src, i64 -262145
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%half = load i16 *%ptr
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; Check that LGH allows an index.
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define i64 @f9(i64 %src, i64 %index) {
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; CHECK-LABEL: f9:
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; CHECK: lgh %r2, 524287(%r3,%r2)
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 524287
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%ptr = inttoptr i64 %add2 to i16 *
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%half = load i16 *%ptr
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%ext = sext i16 %half to i64
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ret i64 %ext
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}
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; Test a case where we spill the source of at least one LGHR. We want
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; to use LGH if possible.
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define void @f10(i64 *%ptr) {
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; CHECK-LABEL: f10:
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; CHECK: lgh {{%r[0-9]+}}, 166(%r15)
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; CHECK: br %r14
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%val0 = load volatile i64 *%ptr
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%val1 = load volatile i64 *%ptr
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%val2 = load volatile i64 *%ptr
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%val3 = load volatile i64 *%ptr
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%val4 = load volatile i64 *%ptr
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%val5 = load volatile i64 *%ptr
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%val6 = load volatile i64 *%ptr
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%val7 = load volatile i64 *%ptr
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%val8 = load volatile i64 *%ptr
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%val9 = load volatile i64 *%ptr
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%val10 = load volatile i64 *%ptr
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%val11 = load volatile i64 *%ptr
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%val12 = load volatile i64 *%ptr
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%val13 = load volatile i64 *%ptr
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%val14 = load volatile i64 *%ptr
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%val15 = load volatile i64 *%ptr
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%trunc0 = trunc i64 %val0 to i16
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%trunc1 = trunc i64 %val1 to i16
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%trunc2 = trunc i64 %val2 to i16
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%trunc3 = trunc i64 %val3 to i16
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%trunc4 = trunc i64 %val4 to i16
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%trunc5 = trunc i64 %val5 to i16
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%trunc6 = trunc i64 %val6 to i16
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%trunc7 = trunc i64 %val7 to i16
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%trunc8 = trunc i64 %val8 to i16
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%trunc9 = trunc i64 %val9 to i16
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%trunc10 = trunc i64 %val10 to i16
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%trunc11 = trunc i64 %val11 to i16
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%trunc12 = trunc i64 %val12 to i16
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%trunc13 = trunc i64 %val13 to i16
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%trunc14 = trunc i64 %val14 to i16
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%trunc15 = trunc i64 %val15 to i16
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%ext0 = sext i16 %trunc0 to i64
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%ext1 = sext i16 %trunc1 to i64
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%ext2 = sext i16 %trunc2 to i64
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%ext3 = sext i16 %trunc3 to i64
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%ext4 = sext i16 %trunc4 to i64
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%ext5 = sext i16 %trunc5 to i64
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%ext6 = sext i16 %trunc6 to i64
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%ext7 = sext i16 %trunc7 to i64
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%ext8 = sext i16 %trunc8 to i64
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%ext9 = sext i16 %trunc9 to i64
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%ext10 = sext i16 %trunc10 to i64
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%ext11 = sext i16 %trunc11 to i64
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%ext12 = sext i16 %trunc12 to i64
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%ext13 = sext i16 %trunc13 to i64
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%ext14 = sext i16 %trunc14 to i64
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%ext15 = sext i16 %trunc15 to i64
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store volatile i64 %val0, i64 *%ptr
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store volatile i64 %val1, i64 *%ptr
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store volatile i64 %val2, i64 *%ptr
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store volatile i64 %val3, i64 *%ptr
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store volatile i64 %val4, i64 *%ptr
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store volatile i64 %val5, i64 *%ptr
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store volatile i64 %val6, i64 *%ptr
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store volatile i64 %val7, i64 *%ptr
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store volatile i64 %val8, i64 *%ptr
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store volatile i64 %val9, i64 *%ptr
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store volatile i64 %val10, i64 *%ptr
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store volatile i64 %val11, i64 *%ptr
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store volatile i64 %val12, i64 *%ptr
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store volatile i64 %val13, i64 *%ptr
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store volatile i64 %val14, i64 *%ptr
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store volatile i64 %val15, i64 *%ptr
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store volatile i64 %ext0, i64 *%ptr
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store volatile i64 %ext1, i64 *%ptr
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store volatile i64 %ext2, i64 *%ptr
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store volatile i64 %ext3, i64 *%ptr
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store volatile i64 %ext4, i64 *%ptr
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store volatile i64 %ext5, i64 *%ptr
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store volatile i64 %ext6, i64 *%ptr
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store volatile i64 %ext7, i64 *%ptr
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store volatile i64 %ext8, i64 *%ptr
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store volatile i64 %ext9, i64 *%ptr
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store volatile i64 %ext10, i64 *%ptr
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store volatile i64 %ext11, i64 *%ptr
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store volatile i64 %ext12, i64 *%ptr
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store volatile i64 %ext13, i64 *%ptr
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store volatile i64 %ext14, i64 *%ptr
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store volatile i64 %ext15, i64 *%ptr
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ret void
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}
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