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f363e3bc43
This feature enables the fusion of such operations on Cortex A57 and Cortex A72, as recommended in their Software Optimisation Guides, sections 4.14 and 4.11, respectively. Differential revision: https://reviews.llvm.org/D49563 llvm-svn: 338147
40 lines
1.4 KiB
LLVM
40 lines
1.4 KiB
LLVM
; RUN: llc %s -o - -mtriple=armv8-unknown -mattr=-fuse-literals,+use-misched | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKDONT
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; RUN: llc %s -o - -mtriple=armv8-unknown -mattr=+fuse-literals,+use-misched | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKFUSE
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@g = common global i32* zeroinitializer
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define i32* @litp(i32 %a, i32 %b) {
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entry:
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%add = add nsw i32 %b, %a
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%ptr = getelementptr i32, i32* bitcast (i32* (i32, i32)* @litp to i32*), i32 %add
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%res = getelementptr i32, i32* bitcast (i32** @g to i32*), i32 %add
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store i32* %ptr, i32** @g, align 4
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ret i32* %res
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; CHECK-LABEL: litp:
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; CHECK: movw [[R:r[0-9]+]], :lower16:litp
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; CHECKDONT-NEXT: movw [[S:r[0-9]+]], :lower16:g
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; CHECKFUSE-NEXT: movt [[R]], :upper16:litp
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; CHECKFUSE-NEXT: movw [[S:r[0-9]+]], :lower16:g
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; CHECKFUSE-NEXT: movt [[S]], :upper16:g
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}
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define i32 @liti(i32 %a, i32 %b) {
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entry:
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%adda = add i32 %a, -262095121
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%add1 = add i32 %adda, %b
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%addb = add i32 %b, 121110837
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%add2 = add i32 %addb, %a
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store i32 %add1, i32* bitcast (i32** @g to i32*), align 4
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ret i32 %add2
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; CHECK-LABEL: liti:
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; CHECK: movw [[R:r[0-9]+]], #309
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; CHECKDONT-NEXT: add {{r[0-9]+}}, {{r[0-9]+}}, {{r[0-9]+}}
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; CHECKFUSE-NEXT: movt [[R]], #1848
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; CHECKFUSE: movw [[S:r[0-9]+]], :lower16:g
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; CHECKFUSE-NEXT: movt [[S]], :upper16:g
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; CHECKFUSE-NEXT: movw [[T:r[0-9]+]], #48879
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; CHECKFUSE-NEXT: movt [[T]], #61536
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}
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