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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/lib/Target/Alpha
Chris Lattner 55343065e3 remove MachineOpCode typedef.
llvm-svn: 45679
2008-01-07 02:48:55 +00:00
..
Alpha.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
Alpha.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaAsmPrinter.cpp Add new shorter predicates for testing machine operands for various types: 2007-12-30 23:10:15 +00:00
AlphaBranchSelector.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaCodeEmitter.cpp Change MachineRelocation::DoesntNeedFnStub to NeedStub. This fields will be used 2008-01-03 02:56:28 +00:00
AlphaInstrFormats.td rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. 2008-01-06 23:38:27 +00:00
AlphaInstrInfo.cpp remove MachineOpCode typedef. 2008-01-07 02:48:55 +00:00
AlphaInstrInfo.h Move even more functionality from MRegisterInfo into TargetInstrInfo. 2008-01-07 01:35:02 +00:00
AlphaInstrInfo.td rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. 2008-01-06 23:38:27 +00:00
AlphaISelDAGToDAG.cpp Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 2007-12-31 04:13:23 +00:00
AlphaISelLowering.cpp Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 2007-12-31 04:13:23 +00:00
AlphaISelLowering.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaJITInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaJITInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaLLRP.cpp Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm 2007-12-30 20:49:49 +00:00
AlphaRegisterInfo.cpp Move even more functionality from MRegisterInfo into TargetInstrInfo. 2008-01-07 01:35:02 +00:00
AlphaRegisterInfo.h Move even more functionality from MRegisterInfo into TargetInstrInfo. 2008-01-07 01:35:02 +00:00
AlphaRegisterInfo.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaRelocations.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSchedule.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSubtarget.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaSubtarget.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetAsmInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetAsmInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetMachine.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
AlphaTargetMachine.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
Makefile remove attribution from lib Makefiles. 2007-12-29 20:09:26 +00:00
README.txt Readme 2007-03-31 15:05:44 +00:00

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html