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18ca382db4
v2: move code to AMDGPUISelLowering.cpp
squash with tests (both EG and SI)
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 207845
41 lines
1.1 KiB
LLVM
41 lines
1.1 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s -check-prefix=EG -check-prefix=FUNC
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;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s -check-prefix=SI -check-prefix=FUNC
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;FUNC-LABEL: test
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;EG: MULADD_IEEE *
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;EG: FRACT *
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;EG: ADD *
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;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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;EG-NOT: COS
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;SI: V_COS_F32
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;SI-NOT: V_COS_F32
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define void @test(float addrspace(1)* %out, float %x) #1 {
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%cos = call float @llvm.cos.f32(float %x)
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store float %cos, float addrspace(1)* %out
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ret void
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}
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;FUNC-LABEL: testv
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;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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;EG: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
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;EG-NOT: COS
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;SI: V_COS_F32
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;SI: V_COS_F32
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;SI: V_COS_F32
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;SI: V_COS_F32
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;SI-NOT: V_COS_F32
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define void @testv(<4 x float> addrspace(1)* %out, <4 x float> inreg %vx) #1 {
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%cos = call <4 x float> @llvm.cos.v4f32(<4 x float> %vx)
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store <4 x float> %cos, <4 x float> addrspace(1)* %out
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ret void
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}
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declare float @llvm.cos.f32(float) readnone
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declare <4 x float> @llvm.cos.v4f32(<4 x float>) readnone
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attributes #0 = { "ShaderType"="0" }
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