Sam Kolton 0ab0b61c0c [AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa ... Summary: Real instruction should copy constraints from real instruction. This allows auto-generated disassembler to correctly process tied operands. Reviewers: nhaustov, vpykhtin, tstellarAMD Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D27847 llvm-svn: 290336		2016-12-22 11:30:48 +00:00
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AArch64
AMDGPU	[AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa	2016-12-22 11:30:48 +00:00
ARM
Hexagon
Lanai
Mips	[mips] Fix aui/daui/dahi/dati for MIPSR6	2016-10-14 09:31:42 +00:00
PowerPC	[PPC] add absolute difference altivec instructions and matching intrinsics	2016-10-31 19:47:52 +00:00
Sparc
SystemZ	[SystemZ] Support remaining atomic instructions	2016-12-02 18:24:16 +00:00
X86	[AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmpsd with an immediate larger than 32. Fix the same bug with VLX vcmpps/vcmppd.	2016-11-13 19:58:18 +00:00
XCore