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Updates the links on the homepage by moving the User Guides, Programming Documentation, and Subsystem Documentation sections to separate pages. Also changes "Overview" to "About" at the top of the LLVM Docs homepage. This work is part of the Google Season of Docs project. llvm-svn: 371096
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5.9 KiB
ReStructuredText
210 lines
5.9 KiB
ReStructuredText
.. _index-subsystem-docs:
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Subsystem Documentation
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=======================
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For API clients and LLVM developers.
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.. toctree::
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:hidden:
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AliasAnalysis
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MemorySSA
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BitCodeFormat
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BlockFrequencyTerminology
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BranchWeightMetadata
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Bugpoint
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BugpointRedesign
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CodeGenerator
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ExceptionHandling
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AddingConstrainedIntrinsics
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LinkTimeOptimization
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SegmentedStacks
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TableGenFundamentals
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TableGen/index
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DebuggingJITedCode
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GoldPlugin
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MarkedUpDisassembly
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SystemLibrary
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SupportLibrary
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SourceLevelDebugging
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Vectorizers
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WritingAnLLVMBackend
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GarbageCollection
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WritingAnLLVMPass
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HowToUseAttributes
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NVPTXUsage
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AMDGPUUsage
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StackMaps
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InAlloca
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BigEndianNEON
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CoverageMappingFormat
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Statepoints
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MergeFunctions
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TypeMetadata
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TransformMetadata
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FaultMaps
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MIRLangRef
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Coroutines
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GlobalISel
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XRay
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XRayExample
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XRayFDRFormat
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PDB/index
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CFIVerify
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SpeculativeLoadHardening
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StackSafetyAnalysis
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LoopTerminology
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:doc:`WritingAnLLVMPass`
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Information on how to write LLVM transformations and analyses.
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:doc:`WritingAnLLVMBackend`
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Information on how to write LLVM backends for machine targets.
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:doc:`CodeGenerator`
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The design and implementation of the LLVM code generator. Useful if you are
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working on retargetting LLVM to a new architecture, designing a new codegen
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pass, or enhancing existing components.
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:doc:`Machine IR (MIR) Format Reference Manual <MIRLangRef>`
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A reference manual for the MIR serialization format, which is used to test
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LLVM's code generation passes.
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:doc:`TableGen <TableGen/index>`
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Describes the TableGen tool, which is used heavily by the LLVM code
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generator.
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:doc:`AliasAnalysis`
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Information on how to write a new alias analysis implementation or how to
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use existing analyses.
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:doc:`MemorySSA`
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Information about the MemorySSA utility in LLVM, as well as how to use it.
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:doc:`GarbageCollection`
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The interfaces source-language compilers should use for compiling GC'd
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programs.
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:doc:`Source Level Debugging with LLVM <SourceLevelDebugging>`
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This document describes the design and philosophy behind the LLVM
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source-level debugger.
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:doc:`Vectorizers`
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This document describes the current status of vectorization in LLVM.
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:doc:`ExceptionHandling`
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This document describes the design and implementation of exception handling
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in LLVM.
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:doc:`AddingConstrainedIntrinsics`
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Gives the steps necessary when adding a new constrained math intrinsic
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to LLVM.
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:doc:`Bugpoint`
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Automatic bug finder and test-case reducer description and usage
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information.
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:doc:`BugpointRedesign`
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Design doc for a redesign of the Bugpoint tool.
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:doc:`BitCodeFormat`
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This describes the file format and encoding used for LLVM "bc" files.
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:doc:`Support Library <SupportLibrary>`
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This document describes the LLVM Support Library (``lib/Support``) and
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how to keep LLVM source code portable
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:doc:`LinkTimeOptimization`
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This document describes the interface between LLVM intermodular optimizer
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and the linker and its design
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:doc:`GoldPlugin`
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How to build your programs with link-time optimization on Linux.
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:doc:`DebuggingJITedCode`
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How to debug JITed code with GDB.
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:doc:`MCJITDesignAndImplementation`
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Describes the inner workings of MCJIT execution engine.
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:doc:`ORCv2`
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Describes the design and implementation of the ORC APIs, including some
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usage examples, and a guide for users transitioning from ORCv1 to ORCv2.
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:doc:`BranchWeightMetadata`
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Provides information about Branch Prediction Information.
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:doc:`BlockFrequencyTerminology`
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Provides information about terminology used in the ``BlockFrequencyInfo``
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analysis pass.
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:doc:`SegmentedStacks`
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This document describes segmented stacks and how they are used in LLVM.
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:doc:`MarkedUpDisassembly`
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This document describes the optional rich disassembly output syntax.
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:doc:`HowToUseAttributes`
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Answers some questions about the new Attributes infrastructure.
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:doc:`NVPTXUsage`
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This document describes using the NVPTX backend to compile GPU kernels.
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:doc:`AMDGPUUsage`
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This document describes using the AMDGPU backend to compile GPU kernels.
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:doc:`StackMaps`
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LLVM support for mapping instruction addresses to the location of
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values and allowing code to be patched.
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:doc:`BigEndianNEON`
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LLVM's support for generating NEON instructions on big endian ARM targets is
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somewhat nonintuitive. This document explains the implementation and rationale.
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:doc:`CoverageMappingFormat`
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This describes the format and encoding used for LLVM’s code coverage mapping.
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:doc:`Statepoints`
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This describes a set of experimental extensions for garbage
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collection support.
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:doc:`MergeFunctions`
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Describes functions merging optimization.
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:doc:`InAlloca`
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Description of the ``inalloca`` argument attribute.
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:doc:`FaultMaps`
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LLVM support for folding control flow into faulting machine instructions.
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:doc:`CompileCudaWithLLVM`
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LLVM support for CUDA.
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:doc:`Coroutines`
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LLVM support for coroutines.
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:doc:`GlobalISel`
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This describes the prototype instruction selection replacement, GlobalISel.
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:doc:`XRay`
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High-level documentation of how to use XRay in LLVM.
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:doc:`XRayExample`
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An example of how to debug an application with XRay.
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:doc:`The Microsoft PDB File Format <PDB/index>`
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A detailed description of the Microsoft PDB (Program Database) file format.
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:doc:`CFIVerify`
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A description of the verification tool for Control Flow Integrity.
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:doc:`SpeculativeLoadHardening`
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A description of the Speculative Load Hardening mitigation for Spectre v1.
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:doc:`StackSafetyAnalysis`
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This document describes the design of the stack safety analysis of local
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variables.
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:doc:`LoopTerminology`
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A document describing Loops and associated terms as used in LLVM. |