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ed62b97b18
lld tests need to be addressed. llvm-svn: 265822
49 lines
1.1 KiB
LLVM
49 lines
1.1 KiB
LLVM
; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \
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; RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s
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; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \
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; RUN: | llvm-objdump -disassemble -triple mips64el - | FileCheck %s
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define i64 @f3(i64 %a0) nounwind readnone {
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entry:
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; CHECK: dsll ${{[0-9]+}}, ${{[0-9]+}}, 10
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%shl = shl i64 %a0, 10
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ret i64 %shl
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}
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define i64 @f4(i64 %a0) nounwind readnone {
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entry:
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; CHECK: dsra ${{[0-9]+}}, ${{[0-9]+}}, 10
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%shr = ashr i64 %a0, 10
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ret i64 %shr
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}
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define i64 @f5(i64 %a0) nounwind readnone {
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entry:
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; CHECK: dsrl ${{[0-9]+}}, ${{[0-9]+}}, 10
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%shr = lshr i64 %a0, 10
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ret i64 %shr
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}
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define i64 @f6(i64 %a0) nounwind readnone {
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entry:
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; CHECK: dsll32 ${{[0-9]+}}, ${{[0-9]+}}, 8
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%shl = shl i64 %a0, 40
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ret i64 %shl
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}
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define i64 @f7(i64 %a0) nounwind readnone {
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entry:
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; CHECK: dsra32 ${{[0-9]+}}, ${{[0-9]+}}, 8
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%shr = ashr i64 %a0, 40
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ret i64 %shr
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}
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define i64 @f8(i64 %a0) nounwind readnone {
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entry:
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; CHECK: dsrl32 ${{[0-9]+}}, ${{[0-9]+}}, 8
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%shr = lshr i64 %a0, 40
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ret i64 %shr
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}
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