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421ddae8b6
ARMv8.2-A adds 16-bit floating point versions of all existing SIMD floating-point instructions. This is an optional extension, so all of these instructions require the FeatureFullFP16 subtarget feature. Note that VFP without SIMD is not a valid combination for any version of ARMv8-A, but I have ensured that these instructions all depend on both FeatureNEON and FeatureFullFP16 for consistency. The ".2h" vector type specifier is now legal (for the scalar pairwise reduction instructions), so some unrelated tests have been modified as different error messages are emitted. This is not a problem as the invalid operands are still caught. llvm-svn: 255010
383 lines
16 KiB
ArmAsm
383 lines
16 KiB
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -mattr=+neon,-fullfp16 -show-encoding < %s 2>&1 | FileCheck %s
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// RUN: not llvm-mc -triple=aarch64 -mattr=-neon,+fullfp16 -show-encoding < %s 2>&1 | FileCheck %s
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fabs.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fneg.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frecpe.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frinta.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintx.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frinti.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintm.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintn.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintp.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintz.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frsqrte.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fsqrt.4h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fabs.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fneg.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frecpe.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frinta.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintx.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frinti.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintm.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintn.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintp.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintz.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frsqrte.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fsqrt.8h v0, v0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmla v0.4h, v1.4h, v2.h[2]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmla v3.8h, v8.8h, v2.h[1]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmls v0.4h, v1.4h, v2.h[2]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmls v3.8h, v8.8h, v2.h[1]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmul v0.4h, v1.4h, v2.h[2]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmul v0.8h, v1.8h, v2.h[2]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmulx v0.4h, v1.4h, v2.h[2]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmulx v0.8h, v1.8h, v2.h[2]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fabd v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmaxnmv h0, v1.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fminnmv h0, v1.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmaxv h0, v1.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fminv h0, v1.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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faddp v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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faddp v0.8h, v1.8h, v2.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fadd v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fadd v0.8h, v1.8h, v2.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fsub v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fsub v0.8h, v1.8h, v2.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq v0.4h, v31.4h, v16.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq v4.8h, v7.8h, v15.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge v3.4h, v8.4h, v12.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge v31.8h, v29.8h, v28.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmle v3.4h, v12.4h, v8.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmle v31.8h, v28.8h, v29.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt v0.4h, v31.4h, v16.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt v4.8h, v7.8h, v15.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmlt v0.4h, v16.4h, v31.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmlt v4.8h, v15.8h, v7.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq v0.4h, v31.4h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq v4.8h, v7.8h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq v0.4h, v31.4h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq v4.8h, v7.8h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge v3.4h, v8.4h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge v31.8h, v29.8h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge v3.4h, v8.4h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge v31.8h, v29.8h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt v0.4h, v31.4h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt v4.8h, v7.8h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt v0.4h, v31.4h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt v4.8h, v7.8h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmle v3.4h, v20.4h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmle v1.8h, v8.8h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmle v3.4h, v20.4h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmle v1.8h, v8.8h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmlt v16.4h, v2.4h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmlt v15.8h, v4.8h, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmlt v16.4h, v2.4h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmlt v15.8h, v4.8h, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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facge v0.4h, v31.4h, v16.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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facge v4.8h, v7.8h, v15.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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facle v0.4h, v16.4h, v31.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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facle v4.8h, v15.8h, v7.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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facgt v3.4h, v8.4h, v12.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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facgt v31.8h, v29.8h, v28.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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faclt v3.4h, v12.4h, v8.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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faclt v31.8h, v28.8h, v29.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frsqrts v0.4h, v31.4h, v16.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frsqrts v4.8h, v7.8h, v15.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frecps v3.4h, v8.4h, v12.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frecps v31.8h, v29.8h, v28.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmaxp v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmaxp v31.8h, v15.8h, v16.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fminp v10.4h, v15.4h, v22.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fminp v3.8h, v5.8h, v6.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmaxnmp v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmaxnmp v31.8h, v15.8h, v16.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fminnmp v10.4h, v15.4h, v22.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fminnmp v3.8h, v5.8h, v6.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmax v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmax v0.8h, v1.8h, v2.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmin v10.4h, v15.4h, v22.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmin v10.8h, v15.8h, v22.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmaxnm v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmaxnm v0.8h, v1.8h, v2.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fminnm v10.4h, v15.4h, v22.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fminnm v10.8h, v15.8h, v22.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmla v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmla v0.8h, v1.8h, v2.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmls v0.4h, v1.4h, v2.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmls v0.8h, v1.8h, v2.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fabd h29, h24, h20
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmla h0, h1, v1.h[5]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmls h2, h3, v4.h[5]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmul h0, h1, v1.h[5]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmulx h6, h2, v8.h[5]
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtzs h21, h12, #1
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtzu h21, h12, #1
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtas h12, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtau h12, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtms h22, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtmu h12, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtns h22, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtnu h12, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtps h22, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtpu h12, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtzs h12, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcvtzu h12, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq h10, h11, h12
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq h10, h11, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmeq h10, h11, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge h10, h11, h12
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge h10, h11, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmge h10, h11, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt h10, h11, h12
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt h10, h11, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmgt h10, h11, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmle h10, h11, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmle h10, h11, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmlt h10, h11, #0.0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fcmlt h10, h11, #0
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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facge h10, h11, h12
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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facgt h10, h11, h12
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fmulx h20, h22, h15
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frecps h21, h16, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frsqrts h21, h5, h12
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frecpe h19, h14
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frecpx h18, h10
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frsqrte h22, h13
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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faddp h18, v3.2h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fabs v4.4h, v0.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fabs v6.8h, v8.8h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fneg v4.4h, v0.4h
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// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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fneg v6.8h, v8.8h
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|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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frintn v4.4h, v0.4h
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|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
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|
frintn v6.8h, v8.8h
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|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frinta v4.4h, v0.4h
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|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frinta v6.8h, v8.8h
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|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frintp v4.4h, v0.4h
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|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frintp v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frintm v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frintm v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frintx v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frintx v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frintz v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frintz v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frinti v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frinti v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtns v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtns v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtnu v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtnu v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtps v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtps v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtpu v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtpu v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtms v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtms v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtmu v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtmu v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtzs v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtzs v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtzu v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtzu v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtas v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtas v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtau v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fcvtau v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frecpe v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frecpe v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frsqrte v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
frsqrte v6.8h, v8.8h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fsqrt v4.4h, v0.4h
|
|
// CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|
|
fsqrt v6.8h, v8.8h
|
|
|
|
// CHECK-NOT: :[[@LINE+1]]:{{[0-9]+}}: error: instruction requires:
|