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7cabf9d02c
will be inserted before these operands. If the opcode changes (by setOpcode), the implicit operands are updated as well. - Added IsKill, IsDead fields to MachineOperand in preparation for changes that move kill / dead info to MachineInstr's. llvm-svn: 31711
388 lines
12 KiB
C++
388 lines
12 KiB
C++
//===-- MachineInstr.cpp --------------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Methods common to all machine instructions.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Support/LeakDetector.h"
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#include <iostream>
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using namespace llvm;
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// Global variable holding an array of descriptors for machine instructions.
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// The actual object needs to be created separately for each target machine.
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// This variable is initialized and reset by class TargetInstrInfo.
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//
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// FIXME: This should be a property of the target so that more than one target
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// at a time can be active...
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//
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namespace llvm {
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extern const TargetInstrDescriptor *TargetInstrDescriptors;
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}
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/// MachineInstr ctor - This constructor only does a _reserve_ of the operands,
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/// not a resize for them. It is expected that if you use this that you call
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/// add* methods below to fill up the operands, instead of the Set methods.
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/// Eventually, the "resizing" ctors will be phased out.
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///
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MachineInstr::MachineInstr(short opcode, unsigned numOperands)
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: Opcode(opcode), parent(0), NumImplicitOps(0) {
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Operands.reserve(numOperands);
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// Make sure that we get added to a machine basicblock
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LeakDetector::addGarbageObject(this);
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}
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void MachineInstr::addImplicitDefUseOperands(const TargetInstrDescriptor &TID) {
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if (TID.ImplicitDefs)
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for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_Register;
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Op.IsDef = true;
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Op.IsImp = true;
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Op.IsKill = false;
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Op.IsDead = false;
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Op.contents.RegNo = *ImpDefs;
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Op.offset = 0;
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Operands.push_back(Op);
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}
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if (TID.ImplicitUses)
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for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_Register;
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Op.IsDef = false;
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Op.IsImp = true;
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Op.IsKill = false;
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Op.IsDead = false;
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Op.contents.RegNo = *ImpUses;
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Op.offset = 0;
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Operands.push_back(Op);
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}
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}
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/// MachineInstr ctor - This constructor create a MachineInstr and add the
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/// implicit operands. It reserves space for numOperand operands.
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MachineInstr::MachineInstr(const TargetInstrInfo &TII, short opcode,
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unsigned numOperands)
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: Opcode(opcode), parent(0), NumImplicitOps(0) {
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const TargetInstrDescriptor &TID = TII.get(opcode);
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if (TID.ImplicitDefs)
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for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs)
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NumImplicitOps++;
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if (TID.ImplicitUses)
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for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses)
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NumImplicitOps++;
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Operands.reserve(NumImplicitOps + numOperands);
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addImplicitDefUseOperands(TID);
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// Make sure that we get added to a machine basicblock
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LeakDetector::addGarbageObject(this);
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}
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/// MachineInstr ctor - Work exactly the same as the ctor above, except that the
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/// MachineInstr is created and added to the end of the specified basic block.
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///
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MachineInstr::MachineInstr(MachineBasicBlock *MBB, short opcode,
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unsigned numOperands)
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: Opcode(opcode), parent(0), NumImplicitOps(0) {
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assert(MBB && "Cannot use inserting ctor with null basic block!");
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const TargetInstrDescriptor &TID = MBB->getParent()->getTarget().
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getInstrInfo()->get(opcode);
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if (TID.ImplicitDefs)
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for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs)
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NumImplicitOps++;
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if (TID.ImplicitUses)
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for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses)
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NumImplicitOps++;
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Operands.reserve(NumImplicitOps + numOperands);
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addImplicitDefUseOperands(TID);
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// Make sure that we get added to a machine basicblock
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LeakDetector::addGarbageObject(this);
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MBB->push_back(this); // Add instruction to end of basic block!
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}
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/// MachineInstr ctor - Copies MachineInstr arg exactly
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///
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MachineInstr::MachineInstr(const MachineInstr &MI) {
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Opcode = MI.getOpcode();
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Operands.reserve(MI.getNumOperands());
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NumImplicitOps = MI.NumImplicitOps;
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// Add operands
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for (unsigned i = 0; i != MI.getNumOperands(); ++i)
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Operands.push_back(MI.getOperand(i));
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// Set parent, next, and prev to null
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parent = 0;
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prev = 0;
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next = 0;
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}
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MachineInstr::~MachineInstr() {
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LeakDetector::removeGarbageObject(this);
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}
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/// removeFromParent - This method unlinks 'this' from the containing basic
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/// block, and returns it, but does not delete it.
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MachineInstr *MachineInstr::removeFromParent() {
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assert(getParent() && "Not embedded in a basic block!");
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getParent()->remove(this);
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return this;
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}
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/// OperandComplete - Return true if it's illegal to add a new operand
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///
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bool MachineInstr::OperandsComplete() const {
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int NumOperands = TargetInstrDescriptors[Opcode].numOperands;
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if ((TargetInstrDescriptors[Opcode].Flags & M_VARIABLE_OPS) == 0 &&
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getNumOperands()-NumImplicitOps >= (unsigned)NumOperands)
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return true; // Broken: we have all the operands of this instruction!
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return false;
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}
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/// isIdenticalTo - Return true if this operand is identical to the specified
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/// operand.
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bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
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if (getType() != Other.getType()) return false;
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switch (getType()) {
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default: assert(0 && "Unrecognized operand type");
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case MachineOperand::MO_Register:
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return getReg() == Other.getReg() && isDef() == Other.isDef();
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case MachineOperand::MO_Immediate:
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return getImm() == Other.getImm();
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case MachineOperand::MO_MachineBasicBlock:
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return getMBB() == Other.getMBB();
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case MachineOperand::MO_FrameIndex:
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return getFrameIndex() == Other.getFrameIndex();
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case MachineOperand::MO_ConstantPoolIndex:
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return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
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getOffset() == Other.getOffset();
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case MachineOperand::MO_JumpTableIndex:
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return getJumpTableIndex() == Other.getJumpTableIndex();
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case MachineOperand::MO_GlobalAddress:
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return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
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case MachineOperand::MO_ExternalSymbol:
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return !strcmp(getSymbolName(), Other.getSymbolName()) &&
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getOffset() == Other.getOffset();
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}
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}
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/// setOpcode - Replace the opcode of the current instruction with a new one.
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///
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void MachineInstr::setOpcode(unsigned Op) {
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Operands.erase(Operands.begin(), Operands.begin()+NumImplicitOps);
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NumImplicitOps = 0;
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Opcode = Op;
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if (!getParent())
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return;
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const TargetInstrDescriptor &TID = getParent()->getParent()->
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getTarget().getInstrInfo()->get(Op);
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if (TID.ImplicitDefs)
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for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_Register;
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Op.IsDef = true;
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Op.IsImp = true;
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Op.IsKill = false;
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Op.IsDead = false;
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Op.contents.RegNo = *ImpDefs;
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Op.offset = 0;
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Operands.insert(Operands.begin()+NumImplicitOps, Op);
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NumImplicitOps++;
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}
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if (TID.ImplicitUses)
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for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses) {
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MachineOperand Op;
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Op.opType = MachineOperand::MO_Register;
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Op.IsDef = false;
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Op.IsImp = true;
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Op.IsKill = false;
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Op.IsDead = false;
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Op.contents.RegNo = *ImpUses;
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Op.offset = 0;
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Operands.insert(Operands.begin()+NumImplicitOps, Op);
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NumImplicitOps++;
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}
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}
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void MachineInstr::dump() const {
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std::cerr << " " << *this;
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}
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static inline void OutputReg(std::ostream &os, unsigned RegNo,
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const MRegisterInfo *MRI = 0) {
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if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
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if (MRI)
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os << "%" << MRI->get(RegNo).Name;
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else
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os << "%mreg(" << RegNo << ")";
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} else
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os << "%reg" << RegNo;
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}
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static void print(const MachineOperand &MO, std::ostream &OS,
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const TargetMachine *TM) {
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const MRegisterInfo *MRI = 0;
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if (TM) MRI = TM->getRegisterInfo();
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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OutputReg(OS, MO.getReg(), MRI);
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break;
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case MachineOperand::MO_Immediate:
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OS << MO.getImmedValue();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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OS << "mbb<"
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<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
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<< "," << (void*)MO.getMachineBasicBlock() << ">";
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break;
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case MachineOperand::MO_FrameIndex:
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OS << "<fi#" << MO.getFrameIndex() << ">";
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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OS << "<cp#" << MO.getConstantPoolIndex() << ">";
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break;
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case MachineOperand::MO_JumpTableIndex:
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OS << "<jt#" << MO.getJumpTableIndex() << ">";
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break;
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case MachineOperand::MO_GlobalAddress:
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OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
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if (MO.getOffset()) OS << "+" << MO.getOffset();
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OS << ">";
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break;
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case MachineOperand::MO_ExternalSymbol:
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OS << "<es:" << MO.getSymbolName();
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if (MO.getOffset()) OS << "+" << MO.getOffset();
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OS << ">";
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break;
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default:
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assert(0 && "Unrecognized operand type");
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}
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}
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void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
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unsigned StartOp = 0;
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// Specialize printing if op#0 is definition
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if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
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::print(getOperand(0), OS, TM);
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OS << " = ";
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++StartOp; // Don't print this operand again!
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}
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// Must check if Target machine is not null because machine BB could not
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// be attached to a Machine function yet
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if (TM)
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OS << TM->getInstrInfo()->getName(getOpcode());
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for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
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const MachineOperand& mop = getOperand(i);
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if (i != StartOp)
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OS << ",";
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OS << " ";
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::print(mop, OS, TM);
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if (mop.isReg()) {
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if (mop.isDef() || mop.isKill() || mop.isDead() || mop.isImplicit()) {
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OS << "<";
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bool NeedComma = false;
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if (mop.isImplicit()) {
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OS << (mop.isDef() ? "imp-def" : "imp-use");
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NeedComma = true;
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} else if (mop.isDef()) {
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OS << "def";
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NeedComma = true;
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}
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if (mop.isKill() || mop.isDead()) {
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if (NeedComma)
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OS << ",";
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if (mop.isKill())
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OS << "kill";
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if (mop.isDead())
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OS << "dead";
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}
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OS << ">";
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}
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}
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}
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OS << "\n";
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}
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std::ostream &llvm::operator<<(std::ostream &os, const MachineInstr &MI) {
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// If the instruction is embedded into a basic block, we can find the target
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// info for the instruction.
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if (const MachineBasicBlock *MBB = MI.getParent()) {
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const MachineFunction *MF = MBB->getParent();
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if (MF)
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MI.print(os, &MF->getTarget());
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else
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MI.print(os, 0);
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return os;
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}
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// Otherwise, print it out in the "raw" format without symbolic register names
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// and such.
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os << TargetInstrDescriptors[MI.getOpcode()].Name;
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for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) {
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os << "\t" << MI.getOperand(i);
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if (MI.getOperand(i).isReg() && MI.getOperand(i).isDef())
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os << "<d>";
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}
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return os << "\n";
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}
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std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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OutputReg(OS, MO.getReg());
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break;
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case MachineOperand::MO_Immediate:
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OS << (long)MO.getImmedValue();
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break;
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case MachineOperand::MO_MachineBasicBlock:
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OS << "<mbb:"
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<< ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
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<< "@" << (void*)MO.getMachineBasicBlock() << ">";
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break;
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case MachineOperand::MO_FrameIndex:
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OS << "<fi#" << MO.getFrameIndex() << ">";
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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OS << "<cp#" << MO.getConstantPoolIndex() << ">";
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break;
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case MachineOperand::MO_JumpTableIndex:
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OS << "<jt#" << MO.getJumpTableIndex() << ">";
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break;
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case MachineOperand::MO_GlobalAddress:
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OS << "<ga:" << ((Value*)MO.getGlobal())->getName() << ">";
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break;
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case MachineOperand::MO_ExternalSymbol:
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OS << "<es:" << MO.getSymbolName() << ">";
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break;
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default:
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assert(0 && "Unrecognized operand type");
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break;
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}
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return OS;
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}
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