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6c1440cf27
Original commit message: Defer some shl transforms to DAGCombine. The shl instruction is used to represent multiplication by a constant power of two as well as bitwise left shifts. Some InstCombine transformations would turn an shl instruction into a bit mask operation, making it difficult for later analysis passes to recognize the constsnt multiplication. Disable those shl transformations, deferring them to DAGCombine time. An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'. These transformations are deferred: (X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses) (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1) (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2) The corresponding exact transformations are preserved, just like div-exact + mul: (X >>?,exact C) << C --> X (X >>?,exact C1) << C2 --> X << (C2-C1) (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2) The disabled transformations could also prevent the instruction selector from recognizing rotate patterns in hash functions and cryptographic primitives. I have a test case for that, but it is too fragile. llvm-svn: 155362
47 lines
1.1 KiB
LLVM
47 lines
1.1 KiB
LLVM
; RUN: opt -instcombine -S < %s | FileCheck %s
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; <rdar://problem/8606771>
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; CHECK: @main
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define i32 @main(i32 %argc) nounwind ssp {
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entry:
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%tmp3151 = trunc i32 %argc to i8
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; CHECK: %tmp3163 = shl i8 %tmp3162, 6
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; CHECK: and i8 %tmp3163, 64
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; CHECK-NOT: shl
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; CHECK-NOT: shr
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%tmp3161 = or i8 %tmp3151, -17
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%tmp3162 = and i8 %tmp3151, 122
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%tmp3163 = xor i8 %tmp3162, -17
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%tmp4114 = shl i8 %tmp3163, 6
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%tmp4115 = xor i8 %tmp4114, %tmp3163
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%tmp4120 = xor i8 %tmp3161, %tmp4115
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%tmp4126 = lshr i8 %tmp4120, 7
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%tmp4127 = mul i8 %tmp4126, 64
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%tmp4086 = zext i8 %tmp4127 to i32
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; CHECK: ret i32
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ret i32 %tmp4086
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}
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; rdar://8739316
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; CHECK: @foo
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define i8 @foo(i8 %arg, i8 %arg1) nounwind {
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bb:
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%tmp = shl i8 %arg, 7
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%tmp2 = and i8 %arg1, 84
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%tmp3 = and i8 %arg1, -118
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%tmp4 = and i8 %arg1, 33
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%tmp5 = sub i8 -88, %tmp2
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%tmp6 = and i8 %tmp5, 84
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%tmp7 = or i8 %tmp4, %tmp6
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%tmp8 = xor i8 %tmp, %tmp3
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%tmp9 = or i8 %tmp7, %tmp8
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%tmp10 = lshr i8 %tmp8, 7
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%tmp11 = shl i8 %tmp10, 5
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; CHECK: %tmp10 = lshr i8 %tmp8, 7
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; CHECK: %tmp11 = shl nuw nsw i8 %tmp10, 5
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%tmp12 = xor i8 %tmp11, %tmp9
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ret i8 %tmp12
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}
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