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History

Dan Gohman cd25487258 Pool-allocation for MachineInstrs, MachineBasicBlocks, and MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212		2008-07-07 23:14:23 +00:00
..
Alpha.h	SimpleInstructionSelector is here no more.	2008-06-25 16:38:59 +00:00
Alpha.td
AlphaAsmPrinter.cpp	Add CommonLinkage; currently tentative definitions	2008-05-14 20:12:51 +00:00
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Pool-allocation for MachineInstrs, MachineBasicBlocks, and	2008-07-07 23:14:23 +00:00
AlphaInstrInfo.h
AlphaInstrInfo.td	Added MemOperands to Atomic operations since Atomics touches memory.	2008-06-25 08:15:39 +00:00
AlphaISelDAGToDAG.cpp	Split scheduling from instruction selection.	2008-06-30 20:45:06 +00:00
AlphaISelLowering.cpp	Pool-allocation for MachineInstrs, MachineBasicBlocks, and	2008-07-07 23:14:23 +00:00
AlphaISelLowering.h	Rather than having a different custom legalization	2008-07-04 11:47:58 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaRegisterInfo.cpp	Pool-allocation for MachineInstrs, MachineBasicBlocks, and	2008-07-07 23:14:23 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp
AlphaTargetMachine.h
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html