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Software pipelining is an optimization for improving ILP by overlapping loop iterations. Swing Modulo Scheduling (SMS) is an implementation of software pipelining that attempts to reduce register pressure and generate efficient pipelines with a low compile-time cost. This implementaion of SMS is a target-independent back-end pass. When enabled, the pass should run just prior to the register allocation pass, while the machine IR is in SSA form. If the pass is successful, then the original loop is replaced by the optimized loop. The optimized loop contains one or more prolog blocks, the pipelined kernel, and one or more epilog blocks. This pass is enabled for Hexagon only. To enable for other targets, a couple of target specific hooks must be implemented, and the pass needs to be called from the target's TargetMachine implementation. Differential Review: http://reviews.llvm.org/D16829 llvm-svn: 277169
96 lines
3.8 KiB
C++
96 lines
3.8 KiB
C++
//===-- CodeGen.cpp -------------------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the common initialization routines for the
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// CodeGen library.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/InitializePasses.h"
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#include "llvm-c/Initialization.h"
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#include "llvm/PassRegistry.h"
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using namespace llvm;
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/// initializeCodeGen - Initialize all passes linked into the CodeGen library.
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void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeAtomicExpandPass(Registry);
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initializeBranchFolderPassPass(Registry);
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initializeCodeGenPreparePass(Registry);
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initializeDeadMachineInstructionElimPass(Registry);
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initializeDetectDeadLanesPass(Registry);
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initializeDwarfEHPreparePass(Registry);
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initializeEarlyIfConverterPass(Registry);
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initializeExpandISelPseudosPass(Registry);
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initializeExpandPostRAPass(Registry);
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initializeFinalizeMachineBundlesPass(Registry);
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initializeFuncletLayoutPass(Registry);
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initializeGCMachineCodeAnalysisPass(Registry);
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initializeGCModuleInfoPass(Registry);
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initializeIfConverterPass(Registry);
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initializeInterleavedAccessPass(Registry);
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initializeLiveDebugVariablesPass(Registry);
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initializeLiveIntervalsPass(Registry);
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initializeLiveStacksPass(Registry);
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initializeLiveVariablesPass(Registry);
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initializeLocalStackSlotPassPass(Registry);
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initializeLowerIntrinsicsPass(Registry);
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initializeMachineBlockFrequencyInfoPass(Registry);
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initializeMachineBlockPlacementPass(Registry);
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initializeMachineBlockPlacementStatsPass(Registry);
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initializeMachineCSEPass(Registry);
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initializeImplicitNullChecksPass(Registry);
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initializeMachineCombinerPass(Registry);
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initializeMachineCopyPropagationPass(Registry);
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initializeMachineDominatorTreePass(Registry);
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initializeMachineFunctionPrinterPassPass(Registry);
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initializeMachineLICMPass(Registry);
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initializeMachineLoopInfoPass(Registry);
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initializeMachineModuleInfoPass(Registry);
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initializeMachinePipelinerPass(Registry);
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initializeMachinePostDominatorTreePass(Registry);
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initializeMachineSchedulerPass(Registry);
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initializeMachineSinkingPass(Registry);
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initializeMachineVerifierPassPass(Registry);
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initializeXRayInstrumentationPass(Registry);
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initializePatchableFunctionPass(Registry);
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initializeOptimizePHIsPass(Registry);
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initializePEIPass(Registry);
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initializePHIEliminationPass(Registry);
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initializePeepholeOptimizerPass(Registry);
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initializePostMachineSchedulerPass(Registry);
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initializePostRAHazardRecognizerPass(Registry);
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initializePostRASchedulerPass(Registry);
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initializePreISelIntrinsicLoweringLegacyPassPass(Registry);
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initializeProcessImplicitDefsPass(Registry);
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initializeRegisterCoalescerPass(Registry);
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initializeRenameIndependentSubregsPass(Registry);
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initializeShrinkWrapPass(Registry);
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initializeSlotIndexesPass(Registry);
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initializeStackColoringPass(Registry);
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initializeStackMapLivenessPass(Registry);
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initializeLiveDebugValuesPass(Registry);
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initializeSafeStackPass(Registry);
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initializeStackProtectorPass(Registry);
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initializeStackSlotColoringPass(Registry);
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initializeTailDuplicatePassPass(Registry);
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initializeTargetPassConfigPass(Registry);
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initializeTwoAddressInstructionPassPass(Registry);
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initializeUnpackMachineBundlesPass(Registry);
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initializeUnreachableBlockElimLegacyPassPass(Registry);
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initializeUnreachableMachineBlockElimPass(Registry);
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initializeVirtRegMapPass(Registry);
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initializeVirtRegRewriterPass(Registry);
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initializeWinEHPreparePass(Registry);
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}
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void LLVMInitializeCodeGen(LLVMPassRegistryRef R) {
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initializeCodeGen(*unwrap(R));
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}
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