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llvm-mirror/test/MC/Disassembler/RISCV/branch-targets.txt
Craig Topper 218109597e [RISCV] Add support for printing pcrel immediates as absolute addresses in llvm-objdump
This makes the llvm-objdump output much more readable and closer to binutils objdump. This builds on D76591

It requires changing the OperandType for certain immediates to "OPERAND_PCREL" so tablegen will generate code to pass the instruction's address. This means we can't do the generic check on these instructions in verifyInstruction any more. Should I add it back with explicit opcode checks? Or should we add a new operand flag to control the passing of address instead of matching the name?

Differential Revision: https://reviews.llvm.org/D92147
2020-12-04 10:34:12 -08:00

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# RUN: llvm-mc -assemble -triple riscv32 -mattr=+c -filetype=obj %s -o - 2>&1 | \
# RUN: llvm-objdump -d --mattr=+c -M no-aliases - | FileCheck %s
# RUN: llvm-mc -assemble -triple riscv64 -mattr=+c -filetype=obj %s -o - 2>&1 | \
# RUN: llvm-objdump -d --mattr=+c -M no-aliases - | FileCheck %s
label1:
.option norvc
j label1
j label2
bnez a0, label1
bnez a0, label2
.option rvc
j label1
j label2
bnez a0, label1
bnez a0, label2
# CHECK-LABEL: <label1>:
# CHECK-NEXT: jal zero, 0x0 <label1>
# CHECK-NEXT: jal zero, 0x18 <label2>
# CHECK-NEXT: bne a0, zero, 0x0 <label1>
# CHECK-NEXT: bne a0, zero, 0x18 <label2>
# CHECK-NEXT: c.j 0x0 <label1>
# CHECK-NEXT: c.j 0x18 <label2>
# CHECK-NEXT: c.bnez a0, 0x0 <label1>
# CHECK-NEXT: c.bnez a0, 0x18 <label2>
label2: