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https://github.com/RPCS3/llvm-mirror.git
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746f3d54fe
kernel verifier is becoming smarter and soon will support direct and indirect function calls. Remove obsolete error from BPF backend. Make call to use PCRel_4 fixup. 'bpf to bpf' calls are distinguished from 'bpf to kernel' calls by insn->src_reg == BPF_PSEUDO_CALL == 1 which is used as relocation indicator similar to ld_imm64->src_reg == BPF_PSEUDO_MAP_FD == 1 The actual 'call' instruction remains the same for both 'bpf to kernel' and 'bpf to bpf' calls. Signed-off-by: Alexei Starovoitov <ast@kernel.org> llvm-svn: 318614
96 lines
2.6 KiB
LLVM
96 lines
2.6 KiB
LLVM
; RUN: llc < %s -march=bpfel -show-mc-encoding | FileCheck %s
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define void @test() #0 {
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entry:
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; CHECK: test:
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; CHECK: r1 = 123 # encoding: [0xb7,0x01,0x00,0x00,0x7b,0x00,0x00,0x00]
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; CHECK: call f_i16
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call void @f_i16(i16 123)
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; CHECK: r1 = 12345678 # encoding: [0xb7,0x01,0x00,0x00,0x4e,0x61,0xbc,0x00]
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; CHECK: call f_i32
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call void @f_i32(i32 12345678)
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; CHECK: r1 = 72623859790382856 ll # encoding: [0x18,0x01,0x00,0x00,0x08,0x07,0x06,0x05,0x00,0x00,0x00,0x00,0x04,0x03,0x02,0x01]
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; CHECK: call f_i64
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call void @f_i64(i64 72623859790382856)
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; CHECK: r1 = 1234
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; CHECK: r2 = 5678
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; CHECK: call f_i32_i32
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call void @f_i32_i32(i32 1234, i32 5678)
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; CHECK: r1 = 2
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; CHECK: r2 = 3
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; CHECK: r3 = 4
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; CHECK: call f_i16_i32_i16
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call void @f_i16_i32_i16(i16 2, i32 3, i16 4)
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; CHECK: r1 = 5
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; CHECK: r2 = 7262385979038285 ll
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; CHECK: r3 = 6
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; CHECK: call f_i16_i64_i16
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call void @f_i16_i64_i16(i16 5, i64 7262385979038285, i16 6)
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ret void
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}
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@g_i16 = common global i16 0, align 2
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@g_i32 = common global i32 0, align 2
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@g_i64 = common global i64 0, align 4
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define void @f_i16(i16 %a) #0 {
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; CHECK: f_i16:
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; CHECK: *(u16 *)(r2 + 0) = r1 # encoding: [0x6b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
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store volatile i16 %a, i16* @g_i16, align 2
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ret void
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}
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define void @f_i32(i32 %a) #0 {
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; CHECK: f_i32:
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; CHECK: *(u16 *)(r2 + 0) = r1 # encoding: [0x6b,0x12,0x00,0x00,0x00,0x00,0x00,0x00]
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; CHECK: *(u16 *)(r2 + 2) = r1 # encoding: [0x6b,0x12,0x02,0x00,0x00,0x00,0x00,0x00]
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store volatile i32 %a, i32* @g_i32, align 2
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ret void
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}
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define void @f_i64(i64 %a) #0 {
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; CHECK: f_i64:
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; CHECK: *(u32 *)(r2 + 0) = r1
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; CHECK: *(u32 *)(r2 + 4) = r1 # encoding: [0x63,0x12,0x04,0x00,0x00,0x00,0x00,0x00]
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store volatile i64 %a, i64* @g_i64, align 2
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ret void
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}
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define void @f_i32_i32(i32 %a, i32 %b) #0 {
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; CHECK: f_i32_i32:
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; CHECK: *(u32 *)(r3 + 0) = r1
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store volatile i32 %a, i32* @g_i32, align 4
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; CHECK: *(u32 *)(r3 + 0) = r2
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store volatile i32 %b, i32* @g_i32, align 4
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ret void
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}
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define void @f_i16_i32_i16(i16 %a, i32 %b, i16 %c) #0 {
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; CHECK: f_i16_i32_i16:
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; CHECK: *(u16 *)(r4 + 0) = r1
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store volatile i16 %a, i16* @g_i16, align 2
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; CHECK: *(u32 *)(r1 + 0) = r2
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store volatile i32 %b, i32* @g_i32, align 4
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; CHECK: *(u16 *)(r4 + 0) = r3
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store volatile i16 %c, i16* @g_i16, align 2
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ret void
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}
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define void @f_i16_i64_i16(i16 %a, i64 %b, i16 %c) #0 {
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; CHECK: f_i16_i64_i16:
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; CHECK: *(u16 *)(r4 + 0) = r1
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store volatile i16 %a, i16* @g_i16, align 2
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; CHECK: *(u64 *)(r1 + 0) = r2 # encoding: [0x7b,0x21,0x00,0x00,0x00,0x00,0x00,0x00]
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store volatile i64 %b, i64* @g_i64, align 8
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; CHECK: *(u16 *)(r4 + 0) = r3
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store volatile i16 %c, i16* @g_i16, align 2
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ret void
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}
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