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llvm-mirror/include/llvm/Target
Matthias Braun ce2b6491f0 RegAllocGreedy: Allow target to specify register class ordering.
Specify an allocation order with a register class. This is used by register
allocators with a greedy heuristic. This is usefull as it is sometimes
beneficial to color more constrained classes first.

Differential Revision: http://reviews.llvm.org/D8626

llvm-svn: 233743
2015-03-31 19:57:53 +00:00
..
CostTable.h
Target.td RegAllocGreedy: Allow target to specify register class ordering. 2015-03-31 19:57:53 +00:00
TargetCallingConv.h AArch64: Safely handle the incoming sret call argument. 2015-02-16 18:10:47 +00:00
TargetCallingConv.td [mips] Remove MipsCC::analyzeCallOperands in favour of CCState::AnalyzeCallOperands. NFC 2014-11-07 11:43:49 +00:00
TargetFrameLowering.h [X86] Convert esp-relative movs of function arguments to pushes, step 2 2015-02-01 16:56:04 +00:00
TargetInstrInfo.h Use the cached subtarget off of the machine function. 2015-03-19 23:06:21 +00:00
TargetIntrinsicInfo.h Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition. 2015-02-15 22:54:22 +00:00
TargetItinerary.td
TargetLowering.h [CodeGen] Report error rather than crash when unable to makeLibCall. 2015-03-26 22:46:58 +00:00
TargetLoweringObjectFile.h COFF: Let globals with private linkage reside in their own section 2015-03-17 23:54:51 +00:00
TargetMachine.h Remove the target independent TargetMachine::getSubtarget and 2015-03-21 04:22:23 +00:00
TargetOpcodes.h Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics 2015-01-13 00:48:10 +00:00
TargetOptions.h Add r228980 back. 2015-02-17 20:48:01 +00:00
TargetRegisterInfo.h RegAllocGreedy: Allow target to specify register class ordering. 2015-03-31 19:57:53 +00:00
TargetSchedule.td Move Post RA Scheduling flag bit into SchedMachineModel 2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td [TableGen] Add support constraining a vector type in a pattern to have a specific element type and for constraining a vector type to have the same number of elements as another vector type. This is useful for AVX512 mask operations so we relate the mask type to the type of the other arguments. 2015-03-05 07:11:34 +00:00
TargetSelectionDAGInfo.h Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition. 2015-02-15 22:54:22 +00:00
TargetSubtargetInfo.h Remove useMachineScheduler and replace it with subtarget options 2015-03-11 22:56:10 +00:00