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Craig Topper ce7901a517 [X86] Use GF2P8AFFINEQB to implement vector bitreverse.

We can use GF2P8AFFINEQB to reverse bits in a byte. Shuffles are needed to reverse the bytes in elements larger than i8. LegalizeVectorOps takes care of inserting the shuffle for the larger element size.

We already have Custom lowering for v16i8 with SSSE3, v32i8 with AVX, and v64i8 with AVX512BW.

I think we might be able to use this for scalars too by moving into a vector and back. But I'll save that for a follow up as its a little more involved.

Reviewed By: RKSimon, pengfei

Differential Revision: https://reviews.llvm.org/D91515

2020-11-17 23:49:06 -08:00

AArch64

[AArch64] Add check for widening instruction for SVE.

2020-11-16 12:30:08 +00:00

AMDGPU

[AMDGPU][CostModel] Refine cost model for half- and quarter-rate instructions.

2020-10-24 19:53:08 +03:00

ARM

[CostModel] make default size cost for libcalls small (again)

2020-11-14 08:15:35 -05:00

PowerPC

Re-land "[PowerPC] Remove QPX/A2Q BGQ/BGP CNK support"