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https://github.com/RPCS3/llvm-mirror.git
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22707e4d3c
This should probably be implied for all the speculatable ones. I think the only ones where this plausibly doesn't apply is s_sendmsghalt and maybe kill.
297 lines
12 KiB
LLVM
297 lines
12 KiB
LLVM
; RUN: opt -mtriple=amdgcn-unknown-amdhsa -S -amdgpu-annotate-kernel-features < %s | FileCheck -check-prefix=HSA %s
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target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
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declare i32 @llvm.amdgcn.workgroup.id.x() #0
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declare i32 @llvm.amdgcn.workgroup.id.y() #0
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declare i32 @llvm.amdgcn.workgroup.id.z() #0
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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declare i32 @llvm.amdgcn.workitem.id.y() #0
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declare i32 @llvm.amdgcn.workitem.id.z() #0
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declare i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr() #0
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declare i8 addrspace(4)* @llvm.amdgcn.queue.ptr() #0
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declare i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr() #0
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declare i1 @llvm.amdgcn.is.shared(i8* nocapture) #2
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declare i1 @llvm.amdgcn.is.private(i8* nocapture) #2
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; HSA: define amdgpu_kernel void @use_tgid_x(i32 addrspace(1)* %ptr) #1 {
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define amdgpu_kernel void @use_tgid_x(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workgroup.id.x()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tgid_y(i32 addrspace(1)* %ptr) #2 {
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define amdgpu_kernel void @use_tgid_y(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workgroup.id.y()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #2 {
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define amdgpu_kernel void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.y()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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%val1 = call i32 @llvm.amdgcn.workgroup.id.y()
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tgid_x_y(i32 addrspace(1)* %ptr) #2 {
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define amdgpu_kernel void @use_tgid_x_y(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.x()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.y()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tgid_z(i32 addrspace(1)* %ptr) #3 {
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define amdgpu_kernel void @use_tgid_z(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workgroup.id.z()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tgid_x_z(i32 addrspace(1)* %ptr) #3 {
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define amdgpu_kernel void @use_tgid_x_z(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.x()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tgid_y_z(i32 addrspace(1)* %ptr) #4 {
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define amdgpu_kernel void @use_tgid_y_z(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.y()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #4 {
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define amdgpu_kernel void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.x()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.y()
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%val2 = call i32 @llvm.amdgcn.workgroup.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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store volatile i32 %val2, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tidig_x(i32 addrspace(1)* %ptr) #1 {
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define amdgpu_kernel void @use_tidig_x(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workitem.id.x()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tidig_y(i32 addrspace(1)* %ptr) #5 {
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define amdgpu_kernel void @use_tidig_y(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workitem.id.y()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tidig_z(i32 addrspace(1)* %ptr) #6 {
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define amdgpu_kernel void @use_tidig_z(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workitem.id.z()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 {
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define amdgpu_kernel void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workitem.id.x()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.x()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #7 {
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define amdgpu_kernel void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workitem.id.y()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.y()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #8 {
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define amdgpu_kernel void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workitem.id.x()
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%val1 = call i32 @llvm.amdgcn.workitem.id.y()
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%val2 = call i32 @llvm.amdgcn.workitem.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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store volatile i32 %val2, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_all_workitems(i32 addrspace(1)* %ptr) #9 {
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define amdgpu_kernel void @use_all_workitems(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workitem.id.x()
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%val1 = call i32 @llvm.amdgcn.workitem.id.y()
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%val2 = call i32 @llvm.amdgcn.workitem.id.z()
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%val3 = call i32 @llvm.amdgcn.workgroup.id.x()
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%val4 = call i32 @llvm.amdgcn.workgroup.id.y()
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%val5 = call i32 @llvm.amdgcn.workgroup.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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store volatile i32 %val2, i32 addrspace(1)* %ptr
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store volatile i32 %val3, i32 addrspace(1)* %ptr
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store volatile i32 %val4, i32 addrspace(1)* %ptr
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store volatile i32 %val5, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #10 {
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define amdgpu_kernel void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #1 {
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%dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.dispatch.ptr()
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%bc = bitcast i8 addrspace(4)* %dispatch.ptr to i32 addrspace(4)*
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%val = load i32, i32 addrspace(4)* %bc
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_queue_ptr(i32 addrspace(1)* %ptr) #11 {
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define amdgpu_kernel void @use_queue_ptr(i32 addrspace(1)* %ptr) #1 {
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%dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.queue.ptr()
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%bc = bitcast i8 addrspace(4)* %dispatch.ptr to i32 addrspace(4)*
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%val = load i32, i32 addrspace(4)* %bc
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_kernarg_segment_ptr(i32 addrspace(1)* %ptr) #12 {
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define amdgpu_kernel void @use_kernarg_segment_ptr(i32 addrspace(1)* %ptr) #1 {
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%dispatch.ptr = call i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
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%bc = bitcast i8 addrspace(4)* %dispatch.ptr to i32 addrspace(4)*
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%val = load i32, i32 addrspace(4)* %bc
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define amdgpu_kernel void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #11 {
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define amdgpu_kernel void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #1 {
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%stof = addrspacecast i32 addrspace(3)* %ptr to i32*
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store volatile i32 0, i32* %stof
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ret void
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}
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; HSA: define amdgpu_kernel void @use_private_to_flat_addrspacecast(i32 addrspace(5)* %ptr) #11 {
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define amdgpu_kernel void @use_private_to_flat_addrspacecast(i32 addrspace(5)* %ptr) #1 {
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%stof = addrspacecast i32 addrspace(5)* %ptr to i32*
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store volatile i32 0, i32* %stof
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ret void
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}
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; HSA: define amdgpu_kernel void @use_flat_to_group_addrspacecast(i32* %ptr) #1 {
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define amdgpu_kernel void @use_flat_to_group_addrspacecast(i32* %ptr) #1 {
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%ftos = addrspacecast i32* %ptr to i32 addrspace(3)*
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store volatile i32 0, i32 addrspace(3)* %ftos
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ret void
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}
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; HSA: define amdgpu_kernel void @use_flat_to_private_addrspacecast(i32* %ptr) #1 {
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define amdgpu_kernel void @use_flat_to_private_addrspacecast(i32* %ptr) #1 {
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%ftos = addrspacecast i32* %ptr to i32 addrspace(5)*
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store volatile i32 0, i32 addrspace(5)* %ftos
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ret void
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}
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; No-op addrspacecast should not use queue ptr
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; HSA: define amdgpu_kernel void @use_global_to_flat_addrspacecast(i32 addrspace(1)* %ptr) #1 {
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define amdgpu_kernel void @use_global_to_flat_addrspacecast(i32 addrspace(1)* %ptr) #1 {
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%stof = addrspacecast i32 addrspace(1)* %ptr to i32*
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store volatile i32 0, i32* %stof
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ret void
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}
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; HSA: define amdgpu_kernel void @use_constant_to_flat_addrspacecast(i32 addrspace(4)* %ptr) #1 {
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define amdgpu_kernel void @use_constant_to_flat_addrspacecast(i32 addrspace(4)* %ptr) #1 {
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%stof = addrspacecast i32 addrspace(4)* %ptr to i32*
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%ld = load volatile i32, i32* %stof
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ret void
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}
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; HSA: define amdgpu_kernel void @use_flat_to_global_addrspacecast(i32* %ptr) #1 {
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define amdgpu_kernel void @use_flat_to_global_addrspacecast(i32* %ptr) #1 {
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%ftos = addrspacecast i32* %ptr to i32 addrspace(1)*
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store volatile i32 0, i32 addrspace(1)* %ftos
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ret void
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}
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; HSA: define amdgpu_kernel void @use_flat_to_constant_addrspacecast(i32* %ptr) #1 {
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define amdgpu_kernel void @use_flat_to_constant_addrspacecast(i32* %ptr) #1 {
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%ftos = addrspacecast i32* %ptr to i32 addrspace(4)*
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%ld = load volatile i32, i32 addrspace(4)* %ftos
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ret void
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}
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; HSA: define amdgpu_kernel void @use_is_shared(i8* %ptr) #11 {
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define amdgpu_kernel void @use_is_shared(i8* %ptr) #1 {
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%is.shared = call i1 @llvm.amdgcn.is.shared(i8* %ptr)
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%ext = zext i1 %is.shared to i32
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store i32 %ext, i32 addrspace(1)* undef
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ret void
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}
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; HSA: define amdgpu_kernel void @use_is_private(i8* %ptr) #11 {
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define amdgpu_kernel void @use_is_private(i8* %ptr) #1 {
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%is.private = call i1 @llvm.amdgcn.is.private(i8* %ptr)
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%ext = zext i1 %is.private to i32
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store i32 %ext, i32 addrspace(1)* undef
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ret void
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}
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; HSA: define amdgpu_kernel void @use_alloca() #13 {
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define amdgpu_kernel void @use_alloca() #1 {
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%alloca = alloca i32, addrspace(5)
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store i32 0, i32 addrspace(5)* %alloca
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ret void
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}
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; HSA: define amdgpu_kernel void @use_alloca_non_entry_block() #13 {
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define amdgpu_kernel void @use_alloca_non_entry_block() #1 {
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entry:
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br label %bb
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bb:
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%alloca = alloca i32, addrspace(5)
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store i32 0, i32 addrspace(5)* %alloca
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ret void
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}
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; HSA: define void @use_alloca_func() #13 {
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define void @use_alloca_func() #1 {
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%alloca = alloca i32, addrspace(5)
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store i32 0, i32 addrspace(5)* %alloca
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ret void
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}
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attributes #0 = { nounwind readnone speculatable }
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attributes #1 = { nounwind }
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; HSA: attributes #0 = { nounwind readnone speculatable willreturn }
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; HSA: attributes #1 = { nounwind }
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; HSA: attributes #2 = { nounwind "amdgpu-work-group-id-y" }
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; HSA: attributes #3 = { nounwind "amdgpu-work-group-id-z" }
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; HSA: attributes #4 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" }
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; HSA: attributes #5 = { nounwind "amdgpu-work-item-id-y" }
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; HSA: attributes #6 = { nounwind "amdgpu-work-item-id-z" }
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; HSA: attributes #7 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-item-id-y" }
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; HSA: attributes #8 = { nounwind "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" }
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; HSA: attributes #9 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" }
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; HSA: attributes #10 = { nounwind "amdgpu-dispatch-ptr" }
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; HSA: attributes #11 = { nounwind "amdgpu-queue-ptr" }
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; HSA: attributes #12 = { nounwind "amdgpu-kernarg-segment-ptr" }
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; HSA: attributes #13 = { nounwind "amdgpu-stack-objects" }
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