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196e7f3138
Replace individual operands GLC, SLC, and DLC with a single cache_policy bitmask operand. This will reduce the number of operands in MIR and I hope the amount of code. These operands are mostly 0 anyway. Additional advantage that parser will accept these flags in any order unlike now. Differential Revision: https://reviews.llvm.org/D96469
346 lines
9.7 KiB
YAML
346 lines
9.7 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: name: vmem_write_sgpr
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_write_sgpr
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_write_exec
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# GCN: BUFFER_STORE_DWORD_OFFEN_exact
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_write_exec
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = IMPLICIT_DEF
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BUFFER_STORE_DWORD_OFFEN_exact killed renamable $vgpr0, renamable $vgpr1, renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
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$exec_lo = S_MOV_B32 -1
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...
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# GCN-LABEL: name: vmem_write_sgpr_chain
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_MOV_B32
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# GCN-NEXT: S_MOV_B32
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# GCN-NEXT: S_MOV_B32
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# GCN-NEXT: S_MOV_B32
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_write_sgpr_chain
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body: |
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bb.0:
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successors:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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$sgpr5 = S_MOV_B32 $sgpr0
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$sgpr6 = S_MOV_B32 $sgpr1
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$sgpr7 = S_MOV_B32 $sgpr2
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$sgpr8 = S_MOV_B32 $sgpr3
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_smem_write_sgpr
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_LOAD_DWORD_IMM
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---
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name: vmem_smem_write_sgpr
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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$sgpr0 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0
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...
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# GCN-LABEL: name: vmem_snop_write_sgpr
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_NOP
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_snop_write_sgpr
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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S_NOP 0
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_valu_write_sgpr
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: V_ADD_F32
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_valu_write_sgpr
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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$vgpr2 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_swait0_write_sgpr
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_WAITCNT
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_swait0_write_sgpr
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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S_WAITCNT 0
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_swait_any_write_sgpr
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_WAITCNT
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_swait_any_write_sgpr
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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S_WAITCNT 1
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_write_exec_impread
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B64
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---
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name: vmem_write_exec_impread
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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$exec = S_MOV_B64 7
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...
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# GCN-LABEL: name: vmem_write_exec_expread
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B64
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---
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name: vmem_write_exec_expread
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $exec_lo, 0, 0, 0, 0, implicit $exec
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$exec = S_MOV_B64 7
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...
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# GCN-LABEL: name: ds_write_m0
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# GCN: DS_READ_B32
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: ds_write_m0
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body: |
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bb.0:
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = DS_READ_B32 $vgpr0, 0, 0, implicit $m0, implicit $exec
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$m0 = S_MOV_B32 7
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...
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# GCN-LABEL: name: vmem_write_sgpr_fall_through
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_write_sgpr_fall_through
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body: |
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bb.0:
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successors: %bb.1
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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bb.1:
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_write_sgpr_branch
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_BRANCH
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# GCN: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_write_sgpr_branch
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body: |
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bb.0:
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successors: %bb.1
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_write_sgpr_branch_around
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_BRANCH
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# GCN: bb.2:
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_write_sgpr_branch_around
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body: |
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bb.0:
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successors: %bb.2
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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S_BRANCH %bb.2
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bb.1:
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successors: %bb.2
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S_WAITCNT 0
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bb.2:
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_write_sgpr_cbranch_around
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# GCN: BUFFER_LOAD_DWORD_OFFEN
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# GCN-NEXT: S_CBRANCH
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# GCN-NEXT: S_BRANCH
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# GCN: bb.1:
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# GCN: S_WAITCNT
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# GCN: V_ADD_CO_U32
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# GCN: bb.2:
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_write_sgpr_cbranch_around
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body: |
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bb.0:
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successors: %bb.1, %bb.2
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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S_CBRANCH_SCC0 %bb.2, implicit $scc
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S_BRANCH %bb.1
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bb.1:
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successors: %bb.2
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S_WAITCNT 0
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$vgpr2, $vcc_lo = V_ADD_CO_U32_e64 $vgpr1, $vgpr1, 0, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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$sgpr0 = S_MOV_B32 0
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...
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# GCN-LABEL: name: vmem_write_sgpr_branch_backedge
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# GCN: $vgpr0 = IMPLICIT_DEF
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_write_sgpr_branch_backedge
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body: |
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bb.0:
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successors: %bb.1
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$sgpr0_sgpr1_sgpr2_sgpr3 = IMPLICIT_DEF
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$sgpr4 = IMPLICIT_DEF
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$vgpr0 = IMPLICIT_DEF
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$sgpr0 = S_MOV_B32 0
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bb.1:
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$vgpr1 = BUFFER_LOAD_DWORD_OFFEN $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 0, 0, 0, 0, implicit $exec
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S_BRANCH %bb.0
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...
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# GCN-LABEL: name: ds_write_exec
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# GCN: DS_WRITE_B32_gfx9
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: ds_write_exec
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body: |
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bb.0:
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = IMPLICIT_DEF
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DS_WRITE_B32_gfx9 $vgpr0, $vgpr1, 0, 0, implicit $exec
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$exec_lo = S_MOV_B32 -1
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...
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# GCN-LABEL: name: vmem_scratch_exec
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# GCN: SCRATCH_LOAD_DWORD
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_scratch_exec
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body: |
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bb.0:
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = SCRATCH_LOAD_DWORD undef $vgpr0, 0, 0, implicit $exec, implicit $flat_scr
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$exec_lo = S_MOV_B32 -1
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...
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# GCN-LABEL: name: vmem_flat_exec
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# GCN: FLAT_LOAD_DWORD
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_flat_exec
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body: |
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bb.0:
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr
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$exec_lo = S_MOV_B32 -1
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...
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# GCN-LABEL: name: vmem_global_exec
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# GCN: GLOBAL_LOAD_DWORD
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_global_exec
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body: |
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bb.0:
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec
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$exec_lo = S_MOV_B32 -1
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...
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# GCN-LABEL: name: vmem_global_atomic_exec
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# GCN: GLOBAL_ATOMIC_ADD_RTN
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# GCN-NEXT: S_WAITCNT_DEPCTR 65507
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# GCN-NEXT: S_MOV_B32
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---
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name: vmem_global_atomic_exec
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body: |
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bb.0:
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$vgpr0 = IMPLICIT_DEF
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = IMPLICIT_DEF
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$vgpr3 = GLOBAL_ATOMIC_ADD_RTN $vgpr0_vgpr1, $vgpr2, 0, 1, implicit $exec :: (load store syncscope("agent") seq_cst 4, addrspace 1)
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$exec_lo = S_MOV_B32 -1
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...
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