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llvm-mirror/docs/AMDGPU/gfx8_attr.rst
Dmitry Preobrazhensky ce9abb7e3a [AMDGPU][MC][DOC] Updated AMD GPU assembler description
Stage 2: added detailed description of operands

See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572

llvm-svn: 349368
2018-12-17 17:38:11 +00:00

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..
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* Automatically generated file, do not edit! *
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.. _amdgpu_synid8_attr:
attr
===========================
Interpolation attribute and channel:
============== ===================================
Syntax Description
============== ===================================
attr{0..32}.x Attribute 0..32 with *x* channel.
attr{0..32}.y Attribute 0..32 with *y* channel.
attr{0..32}.z Attribute 0..32 with *z* channel.
attr{0..32}.w Attribute 0..32 with *w* channel.
============== ===================================
Examples:
.. code-block:: nasm
v_interp_p1_f32 v1, v0, attr0.x
v_interp_p1_f32 v1, v0, attr32.w