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0c336a7923
When a frame pointer is not otherwise required, and dynamic stack alignment is necessary solely due to the spilling of a register with larger alignment requirements than the default stack alignment, the frame pointer can be both used as a general purpose register and a frame pointer. That goes poorly, for obvious reasons. This patch brings back a bit of old logic for identifying the use of such registers and conservatively reserves the frame pointer during register allocation in such cases. For now, implement for X86 only since it's 32-bit linux which is hitting this, and we want a targeted fix for 2.7. As a follow-on, this will be expanded to handle other targets, as theoretically the problem could arise elsewhere as well. llvm-svn: 100559
92 lines
3.1 KiB
C++
92 lines
3.1 KiB
C++
//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the x86
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// target library, as used by the LLVM JIT.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_X86_H
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#define TARGET_X86_H
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class FunctionPass;
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class JITCodeEmitter;
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class MCCodeEmitter;
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class MCContext;
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class MachineCodeEmitter;
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class Target;
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class TargetAsmBackend;
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class X86TargetMachine;
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class formatted_raw_ostream;
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/// createX86ISelDag - This pass converts a legalized DAG into a
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/// X86-specific DAG, ready for instruction scheduling.
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///
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FunctionPass *createX86ISelDag(X86TargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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/// createX86FloatingPointStackifierPass - This function returns a pass which
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/// converts floating point register references and pseudo instructions into
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/// floating point stack references and physical instructions.
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///
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FunctionPass *createX86FloatingPointStackifierPass();
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/// createSSEDomainFixPass - This pass twiddles SSE opcodes to prevent domain
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/// crossings.
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FunctionPass *createSSEDomainFixPass();
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/// createX87FPRegKillInserterPass - This function returns a pass which
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/// inserts FP_REG_KILL instructions where needed.
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///
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FunctionPass *createX87FPRegKillInserterPass();
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/// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
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/// to the specified MCE object.
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FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
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JITCodeEmitter &JCE);
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MCCodeEmitter *createX86_32MCCodeEmitter(const Target &, TargetMachine &TM,
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MCContext &Ctx);
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MCCodeEmitter *createX86_64MCCodeEmitter(const Target &, TargetMachine &TM,
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MCContext &Ctx);
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TargetAsmBackend *createX86_32AsmBackend(const Target &, const std::string &);
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TargetAsmBackend *createX86_64AsmBackend(const Target &, const std::string &);
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/// createX86EmitCodeToMemory - Returns a pass that converts a register
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/// allocated function into raw machine code in a dynamically
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/// allocated chunk of memory.
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///
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FunctionPass *createEmitX86CodeToMemory();
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/// createX86MaxStackAlignmentHeuristicPass - This function returns a pass
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/// which determines whether the frame pointer register should be
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/// reserved in case dynamic stack alignment is later required.
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///
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FunctionPass *createX86MaxStackAlignmentHeuristicPass();
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extern Target TheX86_32Target, TheX86_64Target;
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} // End llvm namespace
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// Defines symbolic names for X86 registers. This defines a mapping from
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// register name to register number.
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//
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#include "X86GenRegisterNames.inc"
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// Defines symbolic names for the X86 instructions.
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//
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#include "X86GenInstrNames.inc"
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#endif
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