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arm-tests.txt
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Added soft fail checks for the disassembler when decoding some corner cases of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM.
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2012-03-22 14:14:49 +00:00 |
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basic-arm-instructions.txt
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Revert r142618, r142622, and r142624, which were based on an incorrect reading of the ARMv7 docs.
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2011-10-20 22:23:58 +00:00 |
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fp-encoding.txt
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ARM VLDR/VSTR instructions don't need a size suffix.
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2011-11-14 23:03:21 +00:00 |
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invalid-Bcc-thumb.txt
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invalid-BFI-arm.txt
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invalid-CPS2p-arm.txt
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invalid-CPS3p-arm.txt
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Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle.
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2011-10-28 18:02:13 +00:00 |
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invalid-DMB-thumb.txt
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invalid-DSB-arm.txt
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invalid-IT-CBNZ-thumb.txt
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invalid-IT-CC15.txt
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Change ARMInstPrinter::printPredicateOperand() so it will not abort if it
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2012-03-01 22:13:02 +00:00 |
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invalid-IT-thumb.txt
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invalid-LDC-form-arm.txt
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invalid-LDM-thumb.txt
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invalid-LDR_POST-arm.txt
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invalid-LDR_PRE-arm.txt
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invalid-LDRB_POST-arm.txt
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invalid-LDRD_PRE-thumb.txt
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invalid-LDRrs-arm.txt
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invalid-LDRT-arm.txt
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invalid-MCR-arm.txt
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invalid-MOVr-arm.txt
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invalid-MOVs-arm.txt
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invalid-MOVs-LSL-arm.txt
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invalid-MOVTi16-arm.txt
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invalid-MSRi-arm.txt
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invalid-RFEorLDMIA-arm.txt
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invalid-SBFX-arm.txt
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invalid-SMLAD-arm.txt
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invalid-SRS-arm.txt
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invalid-STMIA_UPD-thumb.txt
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invalid-SXTB-arm.txt
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invalid-t2Bcc-thumb.txt
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invalid-t2LDRBT-thumb.txt
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invalid-t2LDREXD-thumb.txt
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invalid-t2LDRSHi8-thumb.txt
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invalid-t2LDRSHi12-thumb.txt
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invalid-t2PUSH-thumb.txt
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invalid-t2STR_POST-thumb.txt
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invalid-t2STRD_PRE-thumb.txt
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invalid-t2STREXB-thumb.txt
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invalid-t2STREXD-thumb.txt
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invalid-UMAAL-arm.txt
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invalid-VLD1DUPq8_UPD-arm.txt
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invalid-VLD3DUPd32_UPD-thumb.txt
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invalid-VLDMSDB_UPD-arm.txt
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invalid-VQADD-arm.txt
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invalid-VST2b32_UPD-arm.txt
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ldrd-armv4.txt
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Added fix in TableGen instruction decoder generation. The decoder now breaks for every leaf node.
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2012-04-02 15:20:39 +00:00 |
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lit.local.cfg
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Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu
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2012-03-25 09:02:19 +00:00 |
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memory-arm-instructions.txt
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neon-tests.txt
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Simplify some uses of utohexstr.
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2011-11-07 21:00:59 +00:00 |
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neon.txt
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Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add test
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2012-03-21 20:54:32 +00:00 |
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neont2.txt
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Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add test
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2012-03-21 20:54:32 +00:00 |
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thumb1.txt
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thumb2.txt
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Fix an incorrect decoder test.
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2011-09-26 23:08:34 +00:00 |
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thumb-MSR-MClass.txt
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Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.
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2011-09-28 14:21:38 +00:00 |
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thumb-printf.txt
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thumb-tests.txt
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Thumb2 assembly parsing and encoding for LDC/STC.
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2011-10-12 20:54:17 +00:00 |
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unpredictable-ADDREXT3-arm.txt
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Added soft fail checks for the disassembler when decoding some corner cases of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM.
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2012-03-22 14:14:49 +00:00 |
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unpredictable-LDR-arm.txt
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Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDRSHT instruction on ARM
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2012-03-22 13:24:43 +00:00 |
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unpredictable-LDRD-arm.txt
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Added soft fail checks for the disassembler when decoding some corner cases of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM.
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2012-03-22 14:14:49 +00:00 |
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unpredictable-LSL-regform.txt
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The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.
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2012-03-20 15:54:56 +00:00 |
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unpredictable-MUL-arm.txt
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Added soft fail cases for the disassembler when decoding MUL instructions on ARM.
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2012-03-22 13:14:39 +00:00 |
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unpredictable-RSC-arm.txt
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The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.
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2012-03-20 15:54:56 +00:00 |
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unpredictable-SSAT-arm.txt
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The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.
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2012-03-20 15:54:56 +00:00 |
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unpredictable-STRBrs-arm.txt
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The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.
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2012-03-20 15:54:56 +00:00 |
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unpredictable-UQADD8-arm.txt
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The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.
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2012-03-20 15:54:56 +00:00 |
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unpredictables-thumb.txt
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Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
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2012-02-09 10:56:31 +00:00 |
