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b9807cdcf1
llc using the host cpu features and *waning* on unknown features is probably not a good thing :-( llvm-svn: 189144
40 lines
969 B
LLVM
40 lines
969 B
LLVM
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s -mattr=+sse2,+sse4.1 | FileCheck %s
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; CHECK: func_4_8
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; A single memory write
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; CHECK: movd
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; CHECK-NEXT: ret
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define void @func_4_8(<4 x i8> %param, <4 x i8>* %p) {
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%r = add <4 x i8> %param, <i8 1, i8 2, i8 3, i8 4>
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store <4 x i8> %r, <4 x i8>* %p
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ret void
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}
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; CHECK: func_4_16
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; CHECK: movq
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; CHECK-NEXT: ret
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define void @func_4_16(<4 x i16> %param, <4 x i16>* %p) {
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%r = add <4 x i16> %param, <i16 1, i16 2, i16 3, i16 4>
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store <4 x i16> %r, <4 x i16>* %p
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ret void
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}
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; CHECK: func_8_8
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; CHECK: movq
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; CHECK-NEXT: ret
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define void @func_8_8(<8 x i8> %param, <8 x i8>* %p) {
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%r = add <8 x i8> %param, <i8 1, i8 2, i8 3, i8 4, i8 1, i8 2, i8 3, i8 4>
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store <8 x i8> %r, <8 x i8>* %p
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ret void
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}
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; CHECK: func_2_32
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; CHECK: movq
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; CHECK-NEXT: ret
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define void @func_2_32(<2 x i32> %param, <2 x i32>* %p) {
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%r = add <2 x i32> %param, <i32 1, i32 2>
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store <2 x i32> %r, <2 x i32>* %p
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ret void
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}
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