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When calling SelectionDAG::getNode() to create an ADD or SUB of two vectors with i1 element types we can canonicalise this to use XOR instead, where 1+1 is treated as wrapping around to 0 and 0-1 wraps to 1. I've added the following tests for SVE targets: CodeGen/AArch64/sve-pred-arith.ll and modified some X86 tests to reflect the much simpler codegen required. Differential Revision: https://reviews.llvm.org/D97276 |
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