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dbbaf7f7ef
This patch adds support in the MC layer for parsing and assembling the 4-operand add instruction needed for TLS addressing. This also involves parsing the %tprel_hi, %tprel_lo and %tprel_add operand modifiers. Differential Revision: https://reviews.llvm.org/D55341 llvm-svn: 357698
22 lines
1.1 KiB
ArmAsm
22 lines
1.1 KiB
ArmAsm
# RUN: not llvm-mc -triple riscv32 -mattr=+d < %s 2>&1 | FileCheck %s
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# Out of range immediates
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## simm12
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fld ft1, -2049(a0) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
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fsd ft2, 2048(a1) # CHECK: :[[@LINE]]:10: error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047]
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# Memory operand not formatted correctly
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fld ft1, a0, -200 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
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fsd ft2, a1, 100 # CHECK: :[[@LINE]]:14: error: invalid operand for instruction
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# Invalid register names
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fld ft15, 100(a0) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction
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fld ft1, 100(a10) # CHECK: :[[@LINE]]:14: error: expected register
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fsgnjn.d fa100, fa2, fa3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
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# Integer registers where FP regs are expected
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fadd.d a2, a1, a0 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
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# FP registers where integer regs are expected
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fcvt.wu.d ft2, a1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
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