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llvm-mirror/test/DebugInfo/AArch64
Jeremy Morse 9b82c651ff [InstrRef][AArch64][1/4] Accept constant physreg variable locations
Late in SelectionDAG we join up instruction numbers with their defining
instructions, if it couldn't be done during the main part of SelectionDAG.
One exception is function arguments, where we have to point a DBG_PHI
instruction at the incoming live register, as they don't have a defining
instruction. This patch adds another exception, for constant physregs, like
aarch64 has.

It may seem wasteful to use two instructions where we could use a single
DBG_VALUE, however the whole point of instruction referencing is to
decouple the identification of values from the specification of where
variable location ranges start.

(Part of my aarch64 work to ease adoption of  instruction referencing, as
in the meta comment on D104520)

Differential Revision: https://reviews.llvm.org/D104520
2021-07-26 15:26:15 +01:00
..
asan-stack-vars.mir
big-endian-dump.ll
big-endian.ll
bitfields.ll
call-site-info-output.ll
cfi-eof-prologue.ll
coalescing.ll
compiler-gen-bbs-livedebugvalues.mir
constant-dbgloc.ll
dagcombine-zext.ll
dbg-sve-types.ll
dbg-value-i8.ll
dbg-value-i16.ll
dbgcall-site-float-entry-value.ll
dwarfdump.ll
eh_frame_personality.ll
eh_frame.s
eh-frame.ll
frame-loclistx.s
frameindices.ll
inlined-argument.ll
instr-ref-const-physreg.ll [InstrRef][AArch64][1/4] Accept constant physreg variable locations 2021-07-26 15:26:15 +01:00
ir-outliner.ll
line-header.ll
lit.local.cfg
little-endian-dump.ll
machine-outliner.ll
pr40709.ll
processes-relocations.ll
prologue_end.ll
return-address-signing.ll
struct_by_value.ll
tls-at-location.ll
unretained-declaration-subprogram.ll