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Dylan McKay 7b7d569297 [AVR] Add the pseudo instruction expansion pass
Summary:
A lot of the pseudo instructions are required because LLVM assumes that
all integers of the same size as the pointer size are legal. This means
that it will not currently expand 16-bit instructions to their 8-bit
variants because it thinks 16-bit types are legal for the operations.

This also adds all of the CodeGen tests that required the pass to run.

Reviewers: arsenm, kparzysz

Subscribers: wdng, mgorny, modocache, llvm-commits

Differential Revision: https://reviews.llvm.org/D26577

llvm-svn: 287162
2016-11-16 21:58:04 +00:00

21 lines
590 B
LLVM

; RUN: llc -mattr=sram,eijmpcall < %s -march=avr | FileCheck %s
@brind.k = private unnamed_addr constant [2 x i8*] [i8* blockaddress(@brind, %return), i8* blockaddress(@brind, %b)], align 1
define i8 @brind(i8 %p) {
; CHECK-LABEL: brind:
; CHECK: ld r30
; CHECK: ldd r31
; CHECK: ijmp
entry:
%idxprom = sext i8 %p to i16
%arrayidx = getelementptr inbounds [2 x i8*], [2 x i8*]* @brind.k, i16 0, i16 %idxprom
%s = load i8*, i8** %arrayidx
indirectbr i8* %s, [label %return, label %b]
b:
br label %return
return:
%retval.0 = phi i8 [ 4, %b ], [ 2, %entry ]
ret i8 %retval.0
}