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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
124 lines
6.4 KiB
TableGen
124 lines
6.4 KiB
TableGen
//===-- SparcSchedule.td - Describe the Sparc Itineries ----*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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def IIC_iu_or_fpu_instr : InstrItinClass;
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def IIC_iu_instr : InstrItinClass;
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def IIC_fpu_normal_instr : InstrItinClass;
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def IIC_fpu_fast_instr : InstrItinClass;
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def IIC_jmp_or_call : InstrItinClass;
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def IIC_ldd : InstrItinClass;
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def IIC_st : InstrItinClass;
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def IIC_std : InstrItinClass;
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def IIC_iu_smul : InstrItinClass;
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def IIC_iu_umul : InstrItinClass;
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def IIC_iu_div : InstrItinClass;
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def IIC_ticc : InstrItinClass;
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def IIC_ldstub : InstrItinClass;
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def IIC_fpu_muls : InstrItinClass;
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def IIC_fpu_muld : InstrItinClass;
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def IIC_fpu_divs : InstrItinClass;
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def IIC_fpu_divd : InstrItinClass;
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def IIC_fpu_sqrts : InstrItinClass;
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def IIC_fpu_sqrtd : InstrItinClass;
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def IIC_fpu_abs : InstrItinClass;
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def IIC_fpu_movs : InstrItinClass;
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def IIC_fpu_negs : InstrItinClass;
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def IIC_smac_umac : InstrItinClass;
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def IIC_fpu_stod : InstrItinClass;
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def LEONIU : FuncUnit; // integer unit
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def LEONFPU : FuncUnit; // floating-point unit
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// Ref: http://www.atmel.com/Images/doc4226.pdf
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def LEON2Itineraries : ProcessorItineraries<
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[LEONIU, LEONFPU], [], [
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InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
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InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,
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InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,
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InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,
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InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
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InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [5, 1]>,
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InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [5, 1]>,
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InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,
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InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [4, 1]>,
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InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
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InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [16, 1]>,
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InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [21, 1]>,
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InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [20, 1]>,
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InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [36, 1]>,
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InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [37, 1]>,
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InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [65, 1]>,
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InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [2, 1]>
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]>;
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def LEON3Itineraries : ProcessorItineraries<
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[LEONIU, LEONFPU], [], [
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InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
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InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,
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InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,
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InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [4, 1]>,
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InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
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InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [4, 1]>,
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InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,
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InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [1, 1]>,
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InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [4, 1]>,
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InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,
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InstrItinData<IIC_smac_umac, [InstrStage<1, [LEONIU]>], [2, 1]>,
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InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,
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InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
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InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [4, 1]>,
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InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [4, 1]>,
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InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [16, 1]>,
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InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [17, 1]>,
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InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [24, 1]>,
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InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [25, 1]>,
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InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [4, 1]>
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]>;
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def LEON4Itineraries : ProcessorItineraries<
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[LEONIU, LEONFPU], [], [
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InstrItinData<IIC_iu_or_fpu_instr, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
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InstrItinData<IIC_iu_instr, [InstrStage<1, [LEONIU]>], [1, 1]>,
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InstrItinData<IIC_fpu_normal_instr, [InstrStage<1, [LEONFPU]>], [7, 1]>,
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InstrItinData<IIC_fpu_fast_instr, [InstrStage<1, [LEONFPU]>], [4, 1]>,
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InstrItinData<IIC_jmp_or_call, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
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InstrItinData<IIC_ldd, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
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InstrItinData<IIC_st, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
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InstrItinData<IIC_std, [InstrStage<1, [LEONIU, LEONFPU]>], [1, 1]>,
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InstrItinData<IIC_iu_smul, [InstrStage<1, [LEONIU]>], [1, 1]>,
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InstrItinData<IIC_iu_umul, [InstrStage<1, [LEONIU]>], [4, 1]>,
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InstrItinData<IIC_iu_div, [InstrStage<1, [LEONIU]>], [35, 1]>,
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InstrItinData<IIC_smac_umac, [InstrStage<1, [LEONIU]>], [2, 1]>,
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InstrItinData<IIC_ticc, [InstrStage<1, [LEONIU, LEONFPU]>], [5, 1]>,
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InstrItinData<IIC_ldstub, [InstrStage<1, [LEONIU, LEONFPU]>], [3, 1]>,
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InstrItinData<IIC_fpu_muls, [InstrStage<1, [LEONFPU]>], [4, 1]>,
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InstrItinData<IIC_fpu_muld, [InstrStage<1, [LEONFPU]>], [4, 1]>,
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InstrItinData<IIC_fpu_divs, [InstrStage<1, [LEONFPU]>], [16, 1]>,
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InstrItinData<IIC_fpu_divd, [InstrStage<1, [LEONFPU]>], [17, 1]>,
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InstrItinData<IIC_fpu_sqrts, [InstrStage<1, [LEONFPU]>], [24, 1]>,
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InstrItinData<IIC_fpu_sqrtd, [InstrStage<1, [LEONFPU]>], [25, 1]>,
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InstrItinData<IIC_fpu_abs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_movs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_negs, [InstrStage<1, [LEONFPU]>], [2, 1]>,
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InstrItinData<IIC_fpu_stod, [InstrStage<1, [LEONFPU]>], [4, 1]>
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]>;
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