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llvm-mirror/test/CodeGen/AArch64/cls.ll
vhscampos d767cb8c50 [ARM][AArch64] Implement __cls, __clsl and __clsll intrinsics from ACLE
Summary:
Writing support for three ACLE functions:
  unsigned int __cls(uint32_t x)
  unsigned int __clsl(unsigned long x)
  unsigned int __clsll(uint64_t x)

CLS stands for "Count number of leading sign bits".

In AArch64, these two intrinsics can be translated into the 'cls'
instruction directly. In AArch32, on the other hand, this functionality
is achieved by implementing it in terms of clz (count number of leading
zeros).

Reviewers: compnerd

Reviewed By: compnerd

Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D69250
2019-10-28 11:06:58 +00:00

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522 B
LLVM

; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s
; @llvm.aarch64.cls must be directly translated into the 'cls' instruction
; CHECK-LABEL: cls
; CHECK: cls [[REG:w[0-9]+]], [[REG]]
define i32 @cls(i32 %t) {
%cls.i = call i32 @llvm.aarch64.cls(i32 %t)
ret i32 %cls.i
}
; CHECK-LABEL: cls64
; CHECK: cls [[REG:x[0-9]+]], [[REG]]
define i32 @cls64(i64 %t) {
%cls.i = call i32 @llvm.aarch64.cls64(i64 %t)
ret i32 %cls.i
}
declare i32 @llvm.aarch64.cls(i32) nounwind
declare i32 @llvm.aarch64.cls64(i64) nounwind