Weiming Zhao 38aae27a0a Revert "[ARM] Remove XFAIL on test/CodeGen/Generic/MachineBranchProb.ll" ... Summary: This reverts commit 79c37e1a4ff1e634da8f95322f080601b4c815fc. This test passes locally but fails on the community buildbot. So we will let it XFAIL for now. Patched by Mandeep Singh Grang (mgrang@codeaurora.org) Reviewers: kparzysz, weimingz Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D14189 llvm-svn: 251664		2015-10-29 22:34:59 +00:00
..
AArch64	[AArch64]Merge halfword loads into a 32-bit load	2015-10-27 19:16:03 +00:00
AMDGPU	AMDGPU/SI: handle undef for llvm.SI.packf16	2015-10-29 15:29:09 +00:00
ARM	ARM: add support for WatchOS's compact unwind information.	2015-10-28 22:56:36 +00:00
BPF
CPP
Generic	Revert "[ARM] Remove XFAIL on test/CodeGen/Generic/MachineBranchProb.ll"	2015-10-29 22:34:59 +00:00
Hexagon
Inputs
Mips	[mips] wrong opcode for ll/sc instructions on mipsr6 when -integrated-as is used	2015-10-29 14:40:19 +00:00
MIR	Create a new interface addSuccessorWithoutWeight(MBB*) in MBB to add successors when optimization is disabled.	2015-10-27 17:59:36 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Recurse through constants when looking for TLS globals	2015-10-28 23:43:00 +00:00
SPARC	Drop assert that a call with struct return goes to a function with sret	2015-10-21 20:05:01 +00:00
SystemZ	[SystemZ] Make the CCRegs regclass non-allocatable.	2015-10-29 16:13:55 +00:00
Thumb
Thumb2	[ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev	2015-10-23 17:19:19 +00:00
WebAssembly	[WebAssembly] Update opcode name format for conversions	2015-10-29 04:10:52 +00:00
WinEH
X86	[X86][SSE] Added load+sext tests for 16i1->16i8 and 32i1->32i8	2015-10-29 22:19:21 +00:00
XCore