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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
22 lines
659 B
LLVM
22 lines
659 B
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@iiii = global i64 5, align 8
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@jjjj = global i64 6, align 8
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@kkkk = common global i64 0, align 8
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@.str = private unnamed_addr constant [20 x i8] c"%lld * %lld = %lld\0A\00", align 1
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define void @test() nounwind {
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entry:
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%0 = load i64, i64* @iiii, align 8
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%1 = load i64, i64* @jjjj, align 8
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%mul = mul nsw i64 %1, %0
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store i64 %mul, i64* @kkkk, align 8
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; 16: multu ${{[0-9]+}}, ${{[0-9]+}}
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; 16: mfhi ${{[0-9]+}}
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; 16: mult ${{[0-9]+}}, ${{[0-9]+}}
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; 16: mflo ${{[0-9]+}}
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; 16: mult ${{[0-9]+}}, ${{[0-9]+}}
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; 16: mflo ${{[0-9]+}}
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ret void
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}
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