Craig Topper 2551d36eb1 [X86] Add DAG combine to turn (trunc (srl (mul ext, ext), 16) into PMULHW/PMULHUW. ... Ultimately I want to use this to remove the intrinsics for these instructions. llvm-svn: 330520		2018-04-21 18:39:21 +00:00
..
Analysis	[CostModel][X86] Add vector element insert/extract cost tests	2018-04-20 15:26:59 +00:00
Assembler
Bindings
Bitcode	[IR] Upgrade comment token in objc retain release marker for asm call	2018-04-17 04:02:24 +00:00
BugPoint
CodeGen	[X86] Add DAG combine to turn (trunc (srl (mul ext, ext), 16) into PMULHW/PMULHUW.	2018-04-21 18:39:21 +00:00
DebugInfo	[DebugInfo] Use WithColor for more debug line warnings	2018-04-20 15:29:47 +00:00
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation	[HWASan] Introduce non-zero based and dynamic shadow memory (LLVM).	2018-04-20 20:04:04 +00:00
Integer
JitListener
Linker	[llvm-link] Use WithColor for printing errors	2018-04-18 14:41:47 +00:00
LTO
MC	[X86] WaitPKG instructions	2018-04-20 18:42:47 +00:00
Object
ObjectYAML	[WebAssembly] libObject: Don't include the name the size of custom sections	2018-04-12 20:31:12 +00:00
Other
SafepointIRVerifier
SymbolRewriter
TableGen
ThinLTO/X86
tools	[llvm-mca][X86] Add AVX2 resource tests	2018-04-21 16:12:42 +00:00
Transforms	[InstSimplify] move tests for shifts; NFC	2018-04-21 16:58:00 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py	Enable debug fission for thinLTO linked via gold-plugin	2018-04-13 05:03:28 +00:00
lit.site.cfg.py.in
TestRunner.sh