Matt Arsenault 4c5716bea1 MVT: Add v3i16/v3f16 vectors ... AMDGPU has some buffer intrinsics which theoretically could use this. Some of the generated tables include the 3 and 4 element vector versions of these rounded to 64-bits, which is ambiguous. Add these to help the table disambiguate these. Assertion change is for the path odd sized vectors now take for R600. v3i16 is widened to v4i16, which then needs to be promoted to v4i32. llvm-svn: 369038		2019-08-15 18:58:25 +00:00
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llvm	MVT: Add v3i16/v3f16 vectors	2019-08-15 18:58:25 +00:00
llvm-c	Revert "Expose TailCallKind via the LLVM C API"	2019-08-15 03:49:51 +00:00