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af453b57a3
This patch switches the default for -riscv-no-aliases to false and updates all affected MC and CodeGen tests. As recommended in D41071, MC tests use the canonical instructions and the CodeGen tests use the aliases. Additionally, for the f and d instructions with rounding mode, the tests for the aliased versions are moved and tightened such that they can actually detect if alias emission is enabled. (see D40902 for context) Differential Revision: https://reviews.llvm.org/D41225 Patch by Mario Werner. llvm-svn: 320797
66 lines
1.9 KiB
LLVM
66 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I
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declare void @notdead(i8*)
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; These tests must ensure the stack pointer is restored using the frame
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; pointer
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define void @simple_alloca(i32 %n) nounwind {
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; RV32I-LABEL: simple_alloca:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: addi a0, a0, 15
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; RV32I-NEXT: andi a0, a0, -16
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; RV32I-NEXT: sub a0, sp, a0
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; RV32I-NEXT: mv sp, a0
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; RV32I-NEXT: lui a1, %hi(notdead)
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; RV32I-NEXT: addi a1, a1, %lo(notdead)
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; RV32I-NEXT: jalr a1
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; RV32I-NEXT: addi sp, s0, -16
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = alloca i8, i32 %n
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call void @notdead(i8* %1)
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ret void
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}
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declare i8* @llvm.stacksave()
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declare void @llvm.stackrestore(i8*)
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define void @scoped_alloca(i32 %n) nounwind {
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; RV32I-LABEL: scoped_alloca:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: sw s1, 4(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: mv s1, sp
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; RV32I-NEXT: addi a0, a0, 15
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; RV32I-NEXT: andi a0, a0, -16
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; RV32I-NEXT: sub a0, sp, a0
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; RV32I-NEXT: mv sp, a0
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; RV32I-NEXT: lui a1, %hi(notdead)
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; RV32I-NEXT: addi a1, a1, %lo(notdead)
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; RV32I-NEXT: jalr a1
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; RV32I-NEXT: mv sp, s1
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; RV32I-NEXT: addi sp, s0, -16
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; RV32I-NEXT: lw s1, 4(sp)
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%sp = call i8* @llvm.stacksave()
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%addr = alloca i8, i32 %n
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call void @notdead(i8* %addr)
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call void @llvm.stackrestore(i8* %sp)
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ret void
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}
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