Krzysztof Parzyszek a611af501f [Hexagon] Use correct offset when extracting from the high word ... When extracting a bitfield from the high register in a register pair, the final offset should be relative to the high register (for 32-bit extracts). llvm-svn: 297288		2017-03-08 15:46:28 +00:00
..
AArch64	GlobalISel: use inserts for landingpad instead of sequences.	2017-03-07 23:04:06 +00:00
AMDGPU	AMDGPU: Don't wait at end of block with a trivial successor	2017-03-08 01:06:58 +00:00
ARM	[DAGCombine] Simplify ISD::AND in GetDemandedBits.	2017-03-08 00:56:35 +00:00
AVR
BPF	[SDAG] Revert r296476 (and r296486, r296668, r296690).	2017-03-03 10:02:25 +00:00
Generic	Do not verify MachimeDominatorTree if it is not calculated	2017-03-02 12:00:10 +00:00
Hexagon	[Hexagon] Use correct offset when extracting from the high word	2017-03-08 15:46:28 +00:00
Inputs
Lanai
Mips	[SDAG] Revert r296476 (and r296486, r296668, r296690).	2017-03-03 10:02:25 +00:00
MIR
MSP430	[SDAG] Revert r296476 (and r296486, r296668, r296690).	2017-03-03 10:02:25 +00:00
NVPTX	[NVPTX] Fixed lowering of unaligned loads/stores of f16 scalars and vectors.	2017-03-07 20:33:38 +00:00
PowerPC	Revert "Revert "[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce stack frame size""	2017-03-08 02:41:35 +00:00
SPARC	[Sparc] Check register use with isPhysRegUsed() instead of reg_nodbg_empty()	2017-03-08 15:23:10 +00:00
SystemZ	[SystemZ] Add check VT.isSimple() in canTreateAsByteVector()	2017-03-07 09:49:31 +00:00
Thumb	In Thumb1, materialize a move between low registers as a movs, if CPSR isn't live.	2017-03-07 09:38:16 +00:00
Thumb2
WebAssembly	[WebAssembly] Convert the remaining unit tests to the new wasm-object-file target.	2017-02-28 23:37:04 +00:00
WinEH
X86	[DAGCombine] Simplify ISD::AND in GetDemandedBits.	2017-03-08 00:56:35 +00:00
XCore	[SDAG] Revert r296476 (and r296486, r296668, r296690).	2017-03-03 10:02:25 +00:00