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llvm-mirror/test/MC/Hexagon/vpred_defs.s
Krzysztof Parzyszek da717aa099 [Hexagon] Add support for Hexagon V65
llvm-svn: 320404
2017-12-11 18:57:54 +00:00

10 lines
258 B
ArmAsm

# RUN: llvm-mc -arch=hexagon -mv65 -filetype=asm -mhvx %s | FileCheck %s
# CHECK-NOT: error: register `{{.+}}' modified more than once
{ Q0 = VCMP.EQ(V0.h,V4.h)
Q1 = VCMP.EQ(V1.h,V6.h)
IF (Q3) VTMP.h = VGATHER(R0,M0,V3.h).h
VMEM(R4++#1) = VTMP.new
}