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662d042ab8
The RISC-V ISA defines RV32E as an alternative "base" instruction set encoding, that differs from RV32I by having only 16 rather than 32 registers. This patch adds basic definitions for RV32E as well as MC layer support (assembling, disassembling) and tests. The only supported ABI on RV32E is ILP32E. Add a new RISCVFeatures::validate() helper to RISCVUtils which can be called from codegen or MC layer libraries to validate the combination of TargetTriple and FeatureBitSet. Other targets have similar checks (e.g. erroring if SPE is enabled on PPC64 or oddspreg + o32 ABI on Mips), but they either duplicate the checks (Mips), or fail to check for both codegen and MC codepaths (PPC). Codegen for the ILP32E ABI support and RV32E codegen are left for a future patch/patches. Differential Revision: https://reviews.llvm.org/D59470 llvm-svn: 356744
80 lines
4.7 KiB
ArmAsm
80 lines
4.7 KiB
ArmAsm
# RUN: llvm-mc -triple=riscv32 -target-abi foo < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32I-FOO %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+f -target-abi ilp32foof < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32IF-ILP32FOOF %s
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# RV32I-FOO: 'foo' is not a recognized ABI for this target (ignoring target-abi)
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# RV32IF-ILP32FOOF: 'ilp32foof' is not a recognized ABI for this target (ignoring target-abi)
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# RUN: llvm-mc -triple=riscv64 -target-abi ilp32 < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV64I-ILP32 %s
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# RUN: llvm-mc -triple=riscv64 -mattr=+f -target-abi ilp32f < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV64IF-ILP32F %s
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# RUN: llvm-mc -triple=riscv64 -mattr=+d -target-abi ilp32d < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV64IFD-ILP32D %s
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# RUN: llvm-mc -triple=riscv64 -target-abi ilp32e < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV64I-ILP32E %s
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# RV64I-ILP32: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
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# RV64IF-ILP32F: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
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# RV64IFD-ILP32D: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
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# RV64I-ILP32E: 32-bit ABIs are not supported for 64-bit targets (ignoring target-abi)
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# RUN: llvm-mc -triple=riscv32 -target-abi lp64 < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32I-LP64 %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+f -target-abi lp64f < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32IF-LP64F %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+d -target-abi lp64d < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32IFD-LP64D %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+e -target-abi lp64 < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32E-LP64 %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+e,+f -target-abi lp64f < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32EF-LP64F %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi lp64f < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32EFD-LP64D %s
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# RV32I-LP64: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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# RV32IF-LP64F: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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# RV32IFD-LP64D: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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# RV32E-LP64: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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# RV32EF-LP64F: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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# RV32EFD-LP64D: 64-bit ABIs are not supported for 32-bit targets (ignoring target-abi)
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# RUN: llvm-mc -triple=riscv32 -target-abi ilp32f < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32I-ILP32F %s
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# RUN: llvm-mc -triple=riscv64 -target-abi lp64f < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV64I-LP64F %s
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# RV32I-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
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# RV64I-LP64F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
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# RUN: llvm-mc -triple=riscv32 -target-abi ilp32d < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32I-ILP32D %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+f -target-abi ilp32d < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32IF-ILP32D %s
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# RUN: llvm-mc -triple=riscv64 -target-abi lp64d < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV64I-LP64D %s
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# RUN: llvm-mc -triple=riscv64 -mattr=+f -target-abi lp64d < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV64IF-LP64D %s
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# RV32I-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
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# RV32IF-ILP32D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
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# RV64I-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
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# RV64IF-LP64D: Hard-float 'd' ABI can't be used for a target that doesn't support the D instruction set extension (ignoring target-abi)
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# RUN: llvm-mc -triple=riscv32 -mattr=+e -target-abi ilp32 < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32EF-ILP32F %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+e,+f -target-abi ilp32f < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32EF-ILP32F %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi ilp32f < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32EFD-ILP32F %s
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# RUN: llvm-mc -triple=riscv32 -mattr=+e,+d -target-abi ilp32d < %s 2>&1 \
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# RUN: | FileCheck -check-prefix=RV32EFD-ILP32D %s
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# RV32E-ILP32: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
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# RV32EF-ILP32F: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
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# RV32EFD-ILP32F: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
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# RV32EFD-ILP32D: Only the ilp32e ABI is supported for RV32E (ignoring target-abi)
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nop
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