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https://github.com/RPCS3/llvm-mirror.git
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2ae97a2777
a dirty hack and isn't need anymore since the last x86 code emitter patch) - Add a target-dependent modifier to addend calculation - Use R_X86_64_32S relocation for X86::reloc_absolute_word_sext - Use getELFSectionFlags whenever possible - fix getTextSection to use TLOF and emit the right text section - Handle global emission for static ctors, dtors and Type::PointerTyID - Some minor fixes llvm-svn: 78176
154 lines
4.1 KiB
C++
154 lines
4.1 KiB
C++
//===-- X86ELFWriterInfo.cpp - ELF Writer Info for the X86 backend --------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements ELF writer information for the X86 backend.
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//
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//===----------------------------------------------------------------------===//
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#include "X86ELFWriterInfo.h"
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#include "X86Relocations.h"
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#include "llvm/Function.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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// Implementation of the X86ELFWriterInfo class
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//===----------------------------------------------------------------------===//
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X86ELFWriterInfo::X86ELFWriterInfo(TargetMachine &TM)
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: TargetELFWriterInfo(TM) {
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bool is64Bit = TM.getTargetData()->getPointerSizeInBits() == 64;
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EMachine = is64Bit ? EM_X86_64 : EM_386;
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}
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X86ELFWriterInfo::~X86ELFWriterInfo() {}
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unsigned X86ELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
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if (is64Bit) {
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switch(MachineRelTy) {
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case X86::reloc_pcrel_word:
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return R_X86_64_PC32;
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case X86::reloc_absolute_word:
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return R_X86_64_32;
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case X86::reloc_absolute_word_sext:
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return R_X86_64_32S;
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case X86::reloc_absolute_dword:
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return R_X86_64_64;
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case X86::reloc_picrel_word:
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default:
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llvm_unreachable("unknown x86_64 machine relocation type");
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}
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} else {
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switch(MachineRelTy) {
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case X86::reloc_pcrel_word:
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return R_386_PC32;
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case X86::reloc_absolute_word:
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return R_386_32;
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case X86::reloc_absolute_word_sext:
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case X86::reloc_absolute_dword:
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case X86::reloc_picrel_word:
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default:
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llvm_unreachable("unknown x86 machine relocation type");
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}
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}
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return 0;
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}
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long int X86ELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
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long int Modifier) const {
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if (is64Bit) {
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switch(RelTy) {
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case R_X86_64_PC32: return Modifier - 4;
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case R_X86_64_32:
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case R_X86_64_32S:
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case R_X86_64_64:
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return Modifier;
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default:
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llvm_unreachable("unknown x86_64 relocation type");
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}
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} else {
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switch(RelTy) {
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case R_386_PC32: return Modifier - 4;
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case R_386_32: return Modifier;
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default:
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llvm_unreachable("unknown x86 relocation type");
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}
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}
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return 0;
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}
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unsigned X86ELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
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if (is64Bit) {
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switch(RelTy) {
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case R_X86_64_PC32:
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case R_X86_64_32:
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case R_X86_64_32S:
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return 32;
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case R_X86_64_64:
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return 64;
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default:
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llvm_unreachable("unknown x86_64 relocation type");
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}
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} else {
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switch(RelTy) {
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case R_386_PC32:
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case R_386_32:
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return 32;
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default:
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llvm_unreachable("unknown x86 relocation type");
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}
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}
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return 0;
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}
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bool X86ELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
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if (is64Bit) {
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switch(RelTy) {
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case R_X86_64_PC32:
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return true;
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case R_X86_64_32:
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case R_X86_64_32S:
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case R_X86_64_64:
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return false;
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default:
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llvm_unreachable("unknown x86_64 relocation type");
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}
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} else {
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switch(RelTy) {
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case R_386_PC32:
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return true;
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case R_386_32:
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return false;
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default:
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llvm_unreachable("unknown x86 relocation type");
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}
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}
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return 0;
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}
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unsigned X86ELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
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return is64Bit ?
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X86::reloc_absolute_dword : X86::reloc_absolute_word;
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}
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long int X86ELFWriterInfo::computeRelocation(unsigned SymOffset,
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unsigned RelOffset,
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unsigned RelTy) const {
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if (RelTy == R_X86_64_PC32 || RelTy == R_386_PC32)
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return SymOffset - (RelOffset + 4);
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else
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assert("computeRelocation unknown for this relocation type");
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return 0;
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}
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