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llvm-mirror/include
Nadav Rotem d1815a0763 Not all targets have efficient ISel code generation for select instructions.
For example, the ARM target does not have efficient ISel handling for vector
selects with scalar conditions. This patch adds a TLI hook which allows the
different targets to report which selects are supported well and which selects
should be converted to CF duting codegen prepare.

llvm-svn: 163093
2012-09-02 12:10:19 +00:00
..
llvm Not all targets have efficient ISel code generation for select instructions. 2012-09-02 12:10:19 +00:00
llvm-c Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to 2012-08-17 18:33:14 +00:00