Benjamin Kramer d18bd5e885 post-ra-sched: Replace a std::set of regs with a bitvector. ...

Assuming that a single std::set node adds 3 control words, a bitvector
can store (3*8+4)*8=224 registers in the allocated memory of a single
element in the std::set (x86_64). Also we don't have to call malloc
for every register added.

llvm-svn: 151269

2012-02-23 18:28:32 +00:00

..

Analysis

Fix typo.

2012-02-23 05:38:51 +00:00

Archive

Avoid using an invalidated iterator.

2012-01-23 05:07:16 +00:00

AsmParser

Convert assert(0) to llvm_unreachable

2012-02-07 05:05:23 +00:00

Bitcode

Enable streaming of bitcode

2012-02-06 22:30:29 +00:00

CodeGen

post-ra-sched: Replace a std::set of regs with a bitvector.

2012-02-23 18:28:32 +00:00

DebugInfo

More dead code removal (using -Wunreachable-code)

2012-01-20 21:51:11 +00:00

ExecutionEngine

Remove dead code. Improve llvm_unreachable text. Simplify some control flow.

2012-02-19 11:37:01 +00:00

Linker

Capitalize messages so that they appear nicely with the linker's error messages.

2012-02-14 09:13:54 +00:00

MC

MC: Fix the MCNullStreamer which was broken in r147763.

2012-02-22 23:49:50 +00:00

Object

Remove static ctor.

2012-02-22 13:42:11 +00:00

Support

Update for the removal of Hashing.cpp.

2012-02-23 09:33:44 +00:00

TableGen

Add Foreach Loop

2012-02-22 16:09:41 +00:00

Target

Updated the llvm-mc disassembler C API to support for the X86 target.

2012-02-23 18:18:17 +00:00

Transforms

Reflow code, no functionality change.

2012-02-23 17:42:19 +00:00

VMCore

Reinstate r151049 now that GeneralHash is fixed.

2012-02-23 09:17:40 +00:00

CMakeLists.txt

Move TableGen's parser and entry point into a library

2011-10-01 16:41:13 +00:00

LLVMBuild.txt

LLVMBuild: Introduce a common section which currently has a list of the

2011-12-12 22:45:54 +00:00

Makefile

Remove more of llvmc and dependencies.

2011-09-20 00:34:27 +00:00