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llvm-mirror/test/CodeGen/ARM/no-fpu.ll
David Blaikie ab043ff680 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794
2015-02-27 21:17:42 +00:00

34 lines
1.2 KiB
LLVM

; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon,-vfp2 | FileCheck --check-prefix=NONEON-NOVFP %s
; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon | FileCheck --check-prefix=NONEON %s
; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-vfp2 | FileCheck --check-prefix=NOVFP %s
; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon,+vfp2 | FileCheck --check-prefix=NONEON-VFP %s
; Check no NEON instructions are selected when feature is disabled.
define void @neonop(i64* nocapture readonly %a, i64* nocapture %b) #0 {
%1 = bitcast i64* %a to <2 x i64>*
%wide.load = load <2 x i64>, <2 x i64>* %1, align 8
; NONEON-NOVFP-NOT: vld1.64
; NONEON-NOT: vld1.64
%add = add <2 x i64> %wide.load, %wide.load
; NONEON-NOVFP-NOT: vadd.i64
; NONEON-NOT: vadd.i64
%2 = bitcast i64* %b to <2 x i64>*
store <2 x i64> %add, <2 x i64>* %2, align 8
; NONEON-NOVFP-NOT: vst1.64
; NONEON-NOT: vst1.64
ret void
}
; Likewise with VFP instructions.
define double @fpmult(double %a, double %b) {
%res = fmul double %a, %b
; NONEON-NOVFP-NOT: vmov
; NONEON-NOVFP-NOT: vmul.f64
; NOVFP-NOT: vmov
; NOVFP-NOT: vmul.f64
; NONEON-VFP: vmov
; NONEON-VFP: vmul.f64
ret double %res
}