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llvm-mirror/docs/AMDGPU/gfx8_perm_smem.rst
Dmitry Preobrazhensky ce9abb7e3a [AMDGPU][MC][DOC] Updated AMD GPU assembler description
Stage 2: added detailed description of operands

See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572

llvm-svn: 349368
2018-12-17 17:38:11 +00:00

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.. _amdgpu_synid8_perm_smem:
imm3
===========================
A bit mask which indicates request permissions.
This operand must be specified as an :ref:`integer_number<amdgpu_synid_integer_number>`. The value is truncated to 7 bits, but only 3 low bits are significant.
============ ==============================
Bit Number Description
============ ==============================
0 Request *read* permission.
1 Request *write* permission.
2 Request *execute* permission.
============ ==============================