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d2ade6251c
Match the GNU assembler in supporting immediate operands for these instructions even when the reg-reg mnemonic is used. Differential Revision: https://reviews.llvm.org/D50046 Patch by Kito Cheng. llvm-svn: 339252
196 lines
4.9 KiB
ArmAsm
196 lines
4.9 KiB
ArmAsm
# RUN: llvm-mc %s -triple=riscv32 -riscv-no-aliases \
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# RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv32 \
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# RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-ALIAS %s
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# RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases\
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# RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
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# RUN: llvm-mc %s -triple=riscv64 \
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# RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-objdump -d -riscv-no-aliases - \
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# RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-ALIAS %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-objdump -d -riscv-no-aliases - \
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# RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
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# RUN: | llvm-objdump -d - \
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# RUN: | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-ALIAS %s
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# The following check prefixes are used in this test:
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# CHECK-INST.....Match the canonical instr (tests alias to instr. mapping)
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# CHECK-ALIAS....Match the alias (tests instr. to alias mapping)
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# CHECK-EXPAND...Match canonical instr. unconditionally (tests alias expansion)
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# TODO la
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# TODO lb lh lw
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# TODO sb sh sw
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# CHECK-INST: addi zero, zero, 0
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# CHECK-ALIAS: nop
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nop
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# CHECK-INST: addi t6, zero, 0
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# CHECK-ALIAS: mv t6, zero
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mv x31, zero
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# CHECK-INST: xori t6, ra, -1
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# CHECK-ALIAS: not t6, ra
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not x31, x1
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# CHECK-INST: sub t6, zero, ra
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# CHECK-ALIAS: neg t6, ra
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neg x31, x1
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# CHECK-INST: sltiu t6, ra, 1
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# CHECK-ALIAS: seqz t6, ra
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seqz x31, x1
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# CHECK-INST: sltu t6, zero, ra
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# CHECK-ALIAS: snez t6, ra
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snez x31, x1
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# CHECK-INST: slt t6, ra, zero
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# CHECK-ALIAS: sltz t6, ra
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sltz x31, x1
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# CHECK-INST: slt t6, zero, ra
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# CHECK-ALIAS: sgtz t6, ra
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sgtz x31, x1
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# CHECK-INST: slt ra, gp, sp
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# CHECK-ALIAS: slt ra, gp, sp
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sgt x1, x2, x3
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# CHECK-INST: sltu tp, t1, t0
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# CHECK-ALIAS: sltu tp, t1, t0
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sgtu x4, x5, x6
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# CHECK-INST: beq a0, zero, 512
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# CHECK-ALIAS: beqz a0, 512
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beqz x10, 512
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# CHECK-INST: bne a1, zero, 1024
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# CHECK-ALIAS: bnez a1, 1024
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bnez x11, 1024
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# CHECK-INST: bge zero, a2, 4
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# CHECK-ALIAS: blez a2, 4
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blez x12, 4
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# CHECK-INST: bge a3, zero, 8
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# CHECK-ALIAS: bgez a3, 8
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bgez x13, 8
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# CHECK-INST: blt a4, zero, 12
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# CHECK-ALIAS: bltz a4, 12
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bltz x14, 12
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# CHECK-INST: blt zero, a5, 16
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# CHECK-ALIAS: bgtz a5, 16
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bgtz x15, 16
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# Always output the canonical mnemonic for the pseudo branch instructions.
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# CHECK-INST: blt a6, a5, 20
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# CHECK-ALIAS: blt a6, a5, 20
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bgt x15, x16, 20
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# CHECK-INST: bge a7, a6, 24
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# CHECK-ALIAS: bge a7, a6, 24
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ble x16, x17, 24
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# CHECK-INST: bltu s2, a7, 28
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# CHECK-ALIAS: bltu s2, a7, 28
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bgtu x17, x18, 28
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# CHECK-INST: bgeu s3, s2, 32
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# CHECK-ALIAS: bgeu s3, s2, 32
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bleu x18, x19, 32
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# CHECK-INST: jal zero, 2044
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# CHECK-ALIAS: j 2044
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j 2044
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# CHECK-INST: jal ra, 2040
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# CHECK-ALIAS: jal 2040
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jal 2040
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# CHECK-INST: jalr zero, s4, 0
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# CHECK-ALIAS: jr s4
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jr x20
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# CHECK-INST: jalr ra, s5, 0
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# CHECK-ALIAS: jalr s5
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jalr x21
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# CHECK-INST: jalr zero, ra, 0
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# CHECK-ALIAS: ret
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ret
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# TODO call
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# TODO tail
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# CHECK-INST: fence iorw, iorw
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# CHECK-ALIAS: fence
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fence
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# CHECK-INST: csrrs s10, 3074, zero
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# CHECK-ALIAS: rdinstret s10
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rdinstret x26
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# CHECK-INST: csrrs s8, 3072, zero
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# CHECK-ALIAS: rdcycle s8
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rdcycle x24
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# CHECK-INST: csrrs s9, 3073, zero
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# CHECK-ALIAS: rdtime s9
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rdtime x25
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# CHECK-INST: csrrs s0, 336, zero
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# CHECK-ALIAS: csrr s0, 336
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csrr x8, 0x150
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# CHECK-INST: csrrw zero, 320, s1
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# CHECK-ALIAS: csrw 320, s1
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csrw 0x140, x9
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# CHECK-INST: csrrs zero, 4095, s6
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# CHECK-ALIAS: csrs 4095, s6
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csrs 0xfff, x22
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# CHECK-INST: csrrc zero, 4095, s7
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# CHECK-ALIAS: csrc 4095, s7
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csrc 0xfff, x23
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# CHECK-INST: csrrwi zero, 336, 15
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# CHECK-ALIAS: csrwi 336, 15
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csrwi 0x150, 0xf
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# CHECK-INST: csrrsi zero, 4095, 16
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# CHECK-ALIAS: csrsi 4095, 16
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csrsi 0xfff, 0x10
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# CHECK-INST: csrrci zero, 320, 17
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# CHECK-ALIAS: csrci 320, 17
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csrci 0x140, 0x11
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# CHECK-INST: sfence.vma zero, zero
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# CHECK-ALIAS: sfence.vma
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sfence.vma
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# CHECK-INST: sfence.vma a0, zero
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# CHECK-ALIAS: sfence.vma a0
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sfence.vma a0
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# The following aliases are accepted as input but the canonical form
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# of the instruction will always be printed.
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# CHECK-INST: addi a2, a3, 4
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# CHECK-ALIAS: addi a2, a3, 4
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add a2,a3,4
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# CHECK-INST: andi a2, a3, 4
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# CHECK-ALIAS: andi a2, a3, 4
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and a2,a3,4
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# CHECK-INST: xori a2, a3, 4
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# CHECK-ALIAS: xori a2, a3, 4
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xor a2,a3,4
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# CHECK-INST: ori a2, a3, 4
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# CHECK-ALIAS: ori a2, a3, 4
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or a2,a3,4
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# CHECK-INST: slli a2, a3, 4
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# CHECK-ALIAS: slli a2, a3, 4
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sll a2,a3,4
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# CHECK-INST: srli a2, a3, 4
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# CHECK-ALIAS: srli a2, a3, 4
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srl a2,a3,4
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# CHECK-INST: srai a2, a3, 4
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# CHECK-ALIAS: srai a2, a3, 4
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sra a2,a3,4
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# CHECK-INST: slti a2, a3, 4
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# CHECK-ALIAS: slti a2, a3, 4
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slt a2,a3,4
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# CHECK-INST: sltiu a2, a3, 4
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# CHECK-ALIAS: sltiu a2, a3, 4
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sltu a2,a3,4
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