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https://github.com/RPCS3/llvm-mirror.git
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a7d3c3d387
llvm-svn: 118968
79 lines
1.5 KiB
LLVM
79 lines
1.5 KiB
LLVM
; RUN: llc < %s -march=arm | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s --check-prefix=ARMT2
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; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s --check-prefix=THUMB2
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define i32 @t1(i32 %c) nounwind readnone {
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entry:
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; ARM: t1:
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; ARM: mov r1, #101
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; ARM: orr r1, r1, #1, 24
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; ARM: movgt r0, #123
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; ARMT2: t1:
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; ARMT2: movw r0, #357
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; ARMT2: movgt r0, #123
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; THUMB2: t1:
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; THUMB2: movw r0, #357
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; THUMB2: movgt r0, #123
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%0 = icmp sgt i32 %c, 1
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%1 = select i1 %0, i32 123, i32 357
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ret i32 %1
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}
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define i32 @t2(i32 %c) nounwind readnone {
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entry:
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; ARM: t2:
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; ARM: mov r0, #123
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; ARM: movgt r0, #101
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; ARM: orrgt r0, r0, #1, 24
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; ARMT2: t2:
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; ARMT2: mov r0, #123
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; ARMT2: movwgt r0, #357
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; THUMB2: t2:
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; THUMB2: mov.w r0, #123
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; THUMB2: movwgt r0, #357
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%0 = icmp sgt i32 %c, 1
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%1 = select i1 %0, i32 357, i32 123
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ret i32 %1
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}
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define i32 @t3(i32 %a) nounwind readnone {
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entry:
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; ARM: t3:
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; ARM: mov r0, #0
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; ARM: moveq r0, #1
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; ARMT2: t3:
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; ARMT2: mov r0, #0
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; ARMT2: moveq r0, #1
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; THUMB2: t3:
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; THUMB2: mov.w r0, #0
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; THUMB2: moveq r0, #1
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%0 = icmp eq i32 %a, 160
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%1 = zext i1 %0 to i32
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ret i32 %1
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}
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define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind {
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entry:
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; ARM: t4:
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; ARM: ldr
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; ARM: movlt
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; ARMT2: t4:
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; ARMT2: movwlt r0, #65365
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; ARMT2: movtlt r0, #65365
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; THUMB2: t4:
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; THUMB2: mvnlt.w r0, #11141290
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%0 = icmp slt i32 %a, %b
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%1 = select i1 %0, i32 4283826005, i32 %x
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ret i32 %1
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}
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