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have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. llvm-svn: 125470
52 lines
1.6 KiB
LLVM
52 lines
1.6 KiB
LLVM
; RUN: llc < %s -relocation-model=static -realign-stack=1 -mcpu=yonah | FileCheck %s
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; The double argument is at 4(esp) which is 16-byte aligned, allowing us to
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; fold the load into the andpd.
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i686-apple-darwin8"
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@G = external global double
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define void @test({ double, double }* byval %z, double* %P) nounwind {
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entry:
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%tmp3 = load double* @G, align 16 ; <double> [#uses=1]
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%tmp4 = tail call double @fabs( double %tmp3 ) ; <double> [#uses=1]
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volatile store double %tmp4, double* %P
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%tmp = getelementptr { double, double }* %z, i32 0, i32 0 ; <double*> [#uses=1]
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%tmp1 = volatile load double* %tmp, align 8 ; <double> [#uses=1]
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%tmp2 = tail call double @fabs( double %tmp1 ) ; <double> [#uses=1]
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; CHECK: andpd{{.*}}4(%esp), %xmm
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%tmp6 = fadd double %tmp4, %tmp2 ; <double> [#uses=1]
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volatile store double %tmp6, double* %P, align 8
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ret void
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}
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define void @test2() alignstack(16) nounwind {
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entry:
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; CHECK: andl{{.*}}$-16, %esp
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ret void
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}
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; Use a call to force a spill.
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define <2 x double> @test3(<2 x double> %x, <2 x double> %y) alignstack(32) nounwind {
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entry:
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; CHECK: andl{{.*}}$-32, %esp
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call void @test2()
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%A = fmul <2 x double> %x, %y
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ret <2 x double> %A
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}
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declare double @fabs(double)
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; The pointer is already known aligned, so and x,-16 is eliminable.
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define i32 @test4() nounwind {
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entry:
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%buffer = alloca [2048 x i8], align 16
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%0 = ptrtoint [2048 x i8]* %buffer to i32
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%and = and i32 %0, -16
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ret i32 %and
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; CHECK: test4:
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; CHECK-NOT: and
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; CHECK: ret
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}
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