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Blocks that contain only a single branch instruction to the next block can be skipped in analyzing the loop-nest structure. This is currently done by `getSingleSuccessor()`. However, the branch instruction might have multiple targets which happen to all be the same. In this case, the block should still be considered as empty and skipped. An example is `test/Transforms/LoopInterchange/update-condbranch-duplicate-successors.ll` (the LIT test for this patch is modified from it as well). Reviewed By: Whitney Differential Revision: https://reviews.llvm.org/D97286
45 lines
1.9 KiB
LLVM
45 lines
1.9 KiB
LLVM
; RUN: opt -passes='print<loopnest>' %s 2>&1 | FileCheck %s
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@global = external dso_local global [1000 x [1000 x i32]], align 16
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; CHECK: IsPerfect=true, Depth=1, OutermostLoop: inner.header, Loops: ( inner.header )
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; CHECK-NEXT: IsPerfect=true, Depth=2, OutermostLoop: outer.header, Loops: ( outer.header inner.header )
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define void @foo1(i1 %cmp) {
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entry:
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br i1 %cmp, label %bb1, label %bb1
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bb1: ; preds = %entry, %entry
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br i1 %cmp, label %outer.header.preheader, label %outer.header.preheader
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outer.header.preheader: ; preds = %bb1, %bb1
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br label %outer.header
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outer.header: ; preds = %outer.header.preheader, %outer.latch
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%outer.iv = phi i64 [ %outer.iv.next, %outer.latch ], [ 0, %outer.header.preheader ]
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br i1 %cmp, label %inner.header.preheader, label %inner.header.preheader
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inner.header.preheader: ; preds = %outer.header, %outer.header
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br label %inner.header
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inner.header: ; preds = %inner.header.preheader, %inner.header
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%inner.iv = phi i64 [ %inner.iv.next, %inner.header ], [ 5, %inner.header.preheader ]
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%ptr = getelementptr inbounds [1000 x [1000 x i32]], [1000 x [1000 x i32]]* @global, i64 0, i64 %inner.iv, i64 %outer.iv
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%lv = load i32, i32* %ptr, align 4
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%v = mul i32 %lv, 100
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store i32 %v, i32* %ptr, align 4
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%inner.iv.next = add nsw i64 %inner.iv, 1
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%cond1 = icmp eq i64 %inner.iv.next, 1000
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br i1 %cond1, label %outer.latch, label %inner.header
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outer.latch: ; preds = %inner.header
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%outer.iv.next = add nuw nsw i64 %outer.iv, 1
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%cond2 = icmp eq i64 %outer.iv.next, 1000
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br i1 %cond2, label %bb9, label %outer.header
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bb9: ; preds = %outer.latch
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br label %bb10
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bb10: ; preds = %bb9
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ret void
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}
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