1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
llvm-mirror/test/MC/VE/ADD.s
Kazushi (Jam) Marukawa c27ba18708 [VE] Support fixed-point operation instructions in MC layer
Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
fixed-point operation instructions.  In order to support them, we add
MImm parser to asmparser.  Also add a new MPD instruction which is one
of multiply instructions.

Differential Revision: https://reviews.llvm.org/D81207
2020-06-05 11:56:26 +02:00

25 lines
908 B
ArmAsm

# RUN: llvm-mc -triple=ve --show-encoding < %s \
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
# RUN: | FileCheck %s --check-prefixes=CHECK-INST
# CHECK-INST: addu.l %s11, %s20, %s22
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x96,0x94,0x0b,0x48]
addu.l %s11, %s20, %s22
# CHECK-INST: addu.w %s11, 22, %s22
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x96,0x16,0x8b,0x48]
addu.w %s11, 22, %s22
# CHECK-INST: adds.w.sx %s11, 63, (60)1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x3c,0x3f,0x0b,0x4a]
adds.w.sx %s11, 63, (60)1
# CHECK-INST: adds.w.zx %s11, -64, %s22
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x96,0x40,0x8b,0x4a]
adds.w.zx %s11, -64, %s22
# CHECK-INST: adds.l %s11, -64, (22)0
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x56,0x40,0x0b,0x59]
adds.l %s11, -64, (22)0