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c2509ff480
These are potentially being affected by an upcoming patch.
65 lines
2.9 KiB
LLVM
65 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
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;
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; rdar:13349374
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;
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; SimplifyCFG should not eliminate blocks with volatile stores.
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; Essentially, volatile needs to be backdoor that tells the optimizer
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; it can no longer use language standard as an excuse. The compiler
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; needs to expose the volatile access to the platform.
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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define void @test(i8** nocapture %PeiServices) #0 {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CALL:%.*]] = tail call i32 (...) @Trace() #[[ATTR2:[0-9]+]]
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[CALL]], 0
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_BODY:%.*]], label [[IF_THEN:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: [[CALL1:%.*]] = tail call i32 (...) @Trace() #[[ATTR2]]
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; CHECK-NEXT: br label [[WHILE_BODY]]
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; CHECK: while.body:
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; CHECK-NEXT: [[ADDR_017:%.*]] = phi i8* [ [[INCDEC_PTR:%.*]], [[WHILE_BODY]] ], [ null, [[IF_THEN]] ], [ null, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[X_016:%.*]] = phi i8 [ [[INC:%.*]], [[WHILE_BODY]] ], [ 0, [[IF_THEN]] ], [ 0, [[ENTRY]] ]
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; CHECK-NEXT: [[INC]] = add i8 [[X_016]], 1
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; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[ADDR_017]], i64 1
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; CHECK-NEXT: store volatile i8 [[X_016]], i8* [[ADDR_017]], align 1
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; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint i8* [[INCDEC_PTR]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[TMP0]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], 4096
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; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[END:%.*]]
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; CHECK: end:
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; CHECK-NEXT: ret void
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;
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entry:
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%call = tail call i32 (...) @Trace() #2
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%tobool = icmp eq i32 %call, 0
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br i1 %tobool, label %while.body, label %if.then
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if.then: ; preds = %entry
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%call1 = tail call i32 (...) @Trace() #2
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br label %while.body
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while.body: ; preds = %entry, %if.then, %while.body
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%Addr.017 = phi i8* [ %incdec.ptr, %while.body ], [ null, %if.then ], [ null, %entry ]
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%x.016 = phi i8 [ %inc, %while.body ], [ 0, %if.then ], [ 0, %entry ]
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%inc = add i8 %x.016, 1
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%incdec.ptr = getelementptr inbounds i8, i8* %Addr.017, i64 1
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store volatile i8 %x.016, i8* %Addr.017, align 1
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%0 = ptrtoint i8* %incdec.ptr to i64
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%1 = trunc i64 %0 to i32
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%cmp = icmp ult i32 %1, 4096
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br i1 %cmp, label %while.body, label %end
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end:
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ret void
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}
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declare i32 @Trace(...) #1
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attributes #0 = { nounwind ssp uwtable "fp-contract-model"="standard" "frame-pointer"="non-leaf" "relocation-model"="pic" "ssp-buffers-size"="8" }
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attributes #1 = { "fp-contract-model"="standard" "frame-pointer"="non-leaf" "relocation-model"="pic" "ssp-buffers-size"="8" }
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attributes #2 = { nounwind }
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!0 = !{i32 1039}
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