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llvm-mirror/test/CodeGen
2016-07-08 16:29:11 +00:00
..
AArch64 PeepholeOptimizer: Make pass name match DEBUG_TYPE 2016-07-08 16:29:11 +00:00
AMDGPU AMDGPU: Fix return of non-void-returning shaders 2016-07-06 08:35:17 +00:00
ARM Do not expand SDIV when compiling for minimum code size 2016-07-08 15:32:01 +00:00
BPF
Generic Move CodeGen test from Generic to X86 specific directory 2016-06-10 19:14:01 +00:00
Hexagon [Hexagon] Equally-sized vectors are equivalent in ISel (except vNi1) 2016-06-27 15:08:22 +00:00
Inputs
Lanai [lanai] Use peephole optimizer to generate more conditional ALU operations. 2016-07-07 23:36:04 +00:00
Mips [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions 2016-06-27 08:23:28 +00:00
MIR PeepholeOptimizer: Make pass name match DEBUG_TYPE 2016-07-08 16:29:11 +00:00
MSP430
NVPTX NVPTX: Remove the legacy ptx intrinsics 2016-07-07 16:40:17 +00:00
PowerPC PeepholeOptimizer: Make pass name match DEBUG_TYPE 2016-07-08 16:29:11 +00:00
SPARC [Sparc] Leon errata fix passes. 2016-07-08 15:33:56 +00:00
SystemZ [SystemZ] Remove AND mask of bottom 6 bits when result is used for shift/rotate 2016-07-06 18:13:11 +00:00
Thumb [Thumb] Reapply r272251 with a fix for PR28348 (mk 2) 2016-07-05 12:37:13 +00:00
Thumb2 [Thumb] Reapply r272251 with a fix for PR28348 (mk 2) 2016-07-05 12:37:13 +00:00
WebAssembly
WinEH revert http://reviews.llvm.org/D21101 2016-06-30 17:52:24 +00:00
X86 [X86][SSE] Accept any shuffle mask that is all zeroes 2016-07-08 10:39:12 +00:00
XCore IR: Introduce Module::global_objects(). 2016-06-22 20:29:42 +00:00