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26169930ef
Summary: Change VEAsmParser to support identification with relocation information in assmebler. Change VEAsmBackend to support relocation information in MC layer. Change VEDisassembler and VEMCCodeEmitter to support binary generation of branch target operands. Add REFLONG fixup and variant kind to support new R_VE_REFLONG ELF symbol. And, add regression test in both MC and CodeGen to check binary genaration with relocation information. Differential Revision: https://reviews.llvm.org/D81553
25 lines
944 B
ArmAsm
25 lines
944 B
ArmAsm
# RUN: llvm-mc -triple=ve %s -o - | FileCheck %s
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# RUN: llvm-mc -triple=ve -filetype=obj %s -o - | llvm-objdump -r - | FileCheck %s --check-prefix=CHECK-OBJ
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lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24)
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and %s15, %s15, (32)0
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sic %s16
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lea.sl %s15, _GLOBAL_OFFSET_TABLE_@pc_hi(%s16, %s15)
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lea %s0, src@gotoff_lo
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and %s0, %s0, (32)0
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lea.sl %s0, src@gotoff_hi(, %s0)
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ld1b.zx %s0, (%s0, %s15)
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# CHECK: lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24)
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# CHECK-NEXT: and %s15, %s15, (32)0
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# CHECK-NEXT: sic %s16
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# CHECK-NEXT: lea.sl %s15, _GLOBAL_OFFSET_TABLE_@pc_hi(%s16, %s15)
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# CHECK-NEXT: lea %s0, src@gotoff_lo
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# CHECK-NEXT: and %s0, %s0, (32)0
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# CHECK-NEXT: lea.sl %s0, src@gotoff_hi(, %s0)
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# CHECK-NEXT: ld1b.zx %s0, (%s0, %s15)
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# CHECK-OBJ: 0 R_VE_PC_LO32 _GLOBAL_OFFSET_TABLE_
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# CHECK-OBJ-NEXT: 18 R_VE_PC_HI32 _GLOBAL_OFFSET_TABLE_
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# CHECK-OBJ-NEXT: 20 R_VE_GOTOFF_LO32 src
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# CHECK-OBJ-NEXT: 30 R_VE_GOTOFF_HI32 src
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