mirror of
https://github.com/RPCS3/llvm-mirror.git
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2e5d9743cb
It broke `check-msan`, see e.g. https://lab.llvm.org/buildbot/#/builders/18/builds/1934 This reverts commit 375694a07bcba3be66864c42a5932be1a22831e2.
454 lines
14 KiB
LLVM
454 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -basic-aa -dse -S | FileCheck %s
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; RUN: opt < %s -aa-pipeline=basic-aa -passes=dse -S | FileCheck %s
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target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
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declare i8* @calloc(i64, i64)
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declare void @memset_pattern16(i8*, i8*, i64)
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) nounwind
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declare void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* nocapture, i8, i64, i32) nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
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declare void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32) nounwind
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declare void @llvm.init.trampoline(i8*, i8*, i8*)
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; **** Noop load->store tests **************************************************
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; We CAN optimize volatile loads.
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define void @test_load_volatile(i32* %Q) {
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; CHECK-LABEL: @test_load_volatile(
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; CHECK-NEXT: [[A:%.*]] = load volatile i32, i32* [[Q:%.*]], align 4
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; CHECK-NEXT: ret void
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;
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%a = load volatile i32, i32* %Q
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store i32 %a, i32* %Q
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ret void
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}
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; We can NOT optimize volatile stores.
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define void @test_store_volatile(i32* %Q) {
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; CHECK-LABEL: @test_store_volatile(
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; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[Q:%.*]], align 4
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; CHECK-NEXT: store volatile i32 [[A]], i32* [[Q]], align 4
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; CHECK-NEXT: ret void
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;
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%a = load i32, i32* %Q
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store volatile i32 %a, i32* %Q
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ret void
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}
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; PR2599 - load -> store to same address.
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define void @test12({ i32, i32 }* %x) nounwind {
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; CHECK-LABEL: @test12(
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; CHECK-NEXT: [[TEMP7:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* [[X:%.*]], i32 0, i32 1
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; CHECK-NEXT: [[TEMP8:%.*]] = load i32, i32* [[TEMP7]], align 4
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; CHECK-NEXT: [[TEMP17:%.*]] = sub i32 0, [[TEMP8]]
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; CHECK-NEXT: store i32 [[TEMP17]], i32* [[TEMP7]], align 4
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; CHECK-NEXT: ret void
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;
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%temp4 = getelementptr { i32, i32 }, { i32, i32 }* %x, i32 0, i32 0
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%temp5 = load i32, i32* %temp4, align 4
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%temp7 = getelementptr { i32, i32 }, { i32, i32 }* %x, i32 0, i32 1
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%temp8 = load i32, i32* %temp7, align 4
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%temp17 = sub i32 0, %temp8
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store i32 %temp5, i32* %temp4, align 4
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store i32 %temp17, i32* %temp7, align 4
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ret void
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}
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; Remove redundant store if loaded value is in another block.
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define i32 @test26(i1 %c, i32* %p) {
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; CHECK-LABEL: @test26(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%v = load i32, i32* %p, align 4
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br i1 %c, label %bb1, label %bb2
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bb1:
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br label %bb3
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bb2:
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store i32 %v, i32* %p, align 4
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br label %bb3
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bb3:
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ret i32 0
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}
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; Remove redundant store if loaded value is in another block.
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define i32 @test27(i1 %c, i32* %p) {
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; CHECK-LABEL: @test27(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: br label [[BB3:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%v = load i32, i32* %p, align 4
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br i1 %c, label %bb1, label %bb2
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bb1:
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br label %bb3
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bb2:
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br label %bb3
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bb3:
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store i32 %v, i32* %p, align 4
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ret i32 0
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}
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; Remove redundant store if loaded value is in another block inside a loop.
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define i32 @test31(i1 %c, i32* %p, i32 %i) {
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; CHECK-LABEL: @test31(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1]], label [[BB2:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%v = load i32, i32* %p, align 4
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br label %bb1
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bb1:
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store i32 %v, i32* %p, align 4
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br i1 %c, label %bb1, label %bb2
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bb2:
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ret i32 0
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}
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; Don't remove "redundant" store if %p is possibly stored to.
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define i32 @test46(i1 %c, i32* %p, i32* %p2, i32 %i) {
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; CHECK-LABEL: @test46(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: store i32 [[V]], i32* [[P]], align 4
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1]], label [[BB2:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: store i32 0, i32* [[P2:%.*]], align 4
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; CHECK-NEXT: br i1 [[C]], label [[BB3:%.*]], label [[BB1]]
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; CHECK: bb3:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%v = load i32, i32* %p, align 4
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br label %bb1
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bb1:
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store i32 %v, i32* %p, align 4
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br i1 %c, label %bb1, label %bb2
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bb2:
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store i32 0, i32* %p2, align 4
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br i1 %c, label %bb3, label %bb1
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bb3:
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ret i32 0
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}
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declare void @unknown_func()
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; Remove redundant store, which is in the lame loop as the load.
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define i32 @test33(i1 %c, i32* %p, i32 %i) {
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; CHECK-LABEL: @test33(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: br label [[BB2:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: call void @unknown_func()
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1]], label [[BB3:%.*]]
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; CHECK: bb3:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %bb1
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bb1:
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%v = load i32, i32* %p, align 4
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br label %bb2
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bb2:
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store i32 %v, i32* %p, align 4
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; Might read and overwrite value at %p, but doesn't matter.
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call void @unknown_func()
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br i1 %c, label %bb1, label %bb3
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bb3:
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ret i32 0
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}
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declare void @unkown_write(i32*)
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; We can't remove the "noop" store around an unkown write.
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define void @test43(i32* %Q) {
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; CHECK-LABEL: @test43(
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; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[Q:%.*]], align 4
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; CHECK-NEXT: call void @unkown_write(i32* [[Q]])
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; CHECK-NEXT: store i32 [[A]], i32* [[Q]], align 4
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; CHECK-NEXT: ret void
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;
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%a = load i32, i32* %Q
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call void @unkown_write(i32* %Q)
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store i32 %a, i32* %Q
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ret void
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}
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; We CAN remove it when the unkown write comes AFTER.
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define void @test44(i32* %Q) {
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; CHECK-LABEL: @test44(
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; CHECK-NEXT: call void @unkown_write(i32* [[Q:%.*]])
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; CHECK-NEXT: ret void
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;
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%a = load i32, i32* %Q
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store i32 %a, i32* %Q
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call void @unkown_write(i32* %Q)
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ret void
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}
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define void @test45(i32* %Q) {
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; CHECK-LABEL: @test45(
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; CHECK-NEXT: ret void
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;
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%a = load i32, i32* %Q
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store i32 10, i32* %Q
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store i32 %a, i32* %Q
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ret void
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}
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define i32 @test48(i1 %c, i32* %p) {
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; CHECK-LABEL: @test48(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB0:%.*]], label [[BB0_0:%.*]]
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; CHECK: bb0:
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; CHECK-NEXT: store i32 0, i32* [[P]], align 4
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; CHECK-NEXT: br i1 [[C]], label [[BB1:%.*]], label [[BB2:%.*]]
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; CHECK: bb0.0:
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; CHECK-NEXT: br label [[BB1]]
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; CHECK: bb1:
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; CHECK-NEXT: store i32 [[V]], i32* [[P]], align 4
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; CHECK-NEXT: br i1 [[C]], label [[BB2]], label [[BB0]]
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; CHECK: bb2:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%v = load i32, i32* %p, align 4
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br i1 %c, label %bb0, label %bb0.0
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bb0:
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store i32 0, i32* %p
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br i1 %c, label %bb1, label %bb2
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bb0.0:
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br label %bb1
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bb1:
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store i32 %v, i32* %p, align 4
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br i1 %c, label %bb2, label %bb0
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bb2:
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ret i32 0
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}
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define i32 @test47(i1 %c, i32* %p, i32 %i) {
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; CHECK-LABEL: @test47(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1]], label [[BB2:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: br i1 [[C]], label [[BB3:%.*]], label [[BB1]]
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; CHECK: bb3:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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%v = load i32, i32* %p, align 4
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br label %bb1
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bb1:
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store i32 %v, i32* %p, align 4
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br i1 %c, label %bb1, label %bb2
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bb2:
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store i32 %v, i32* %p, align 4
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br i1 %c, label %bb3, label %bb1
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bb3:
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ret i32 0
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}
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; Test case from PR47887.
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define void @test_noalias_store_between_load_and_store(i32* noalias %x, i32* noalias %y) {
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; CHECK-LABEL: @test_noalias_store_between_load_and_store(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: store i32 0, i32* [[Y:%.*]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%lv = load i32, i32* %x, align 4
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store i32 0, i32* %y, align 4
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store i32 %lv, i32* %x, align 4
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ret void
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}
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; Test case from PR47887. Currently we eliminate the dead `store i32 %inc, i32* %x`,
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; but not the no-op `store i32 %lv, i32* %x`. That is because no-op stores are
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; eliminated before dead stores for the same def.
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define void @test_noalias_store_between_load_and_store_elimin_order(i32* noalias %x, i32* noalias %y) {
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; CHECK-LABEL: @test_noalias_store_between_load_and_store_elimin_order(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: store i32 0, i32* [[Y:%.*]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%lv = load i32, i32* %x, align 4
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%inc = add nsw i32 %lv, 1
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store i32 %inc, i32* %x, align 4
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store i32 0, i32* %y, align 4
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store i32 %lv, i32* %x, align 4
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ret void
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}
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; PR50143
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define i8* @store_zero_after_calloc_inaccessiblememonly() {
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; CHECK-LABEL: @store_zero_after_calloc_inaccessiblememonly(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 1, i64 10) #[[ATTR6:[0-9]+]]
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; CHECK-NEXT: store i8 0, i8* [[CALL]], align 1
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; CHECK-NEXT: ret i8* [[CALL]]
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;
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%call = tail call i8* @calloc(i64 1, i64 10) inaccessiblememonly
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store i8 0, i8* %call
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ret i8* %call
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}
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define i8* @zero_memset_after_calloc() {
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; CHECK-LABEL: @zero_memset_after_calloc(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
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; CHECK-NEXT: ret i8* [[CALL]]
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;
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%call = tail call i8* @calloc(i64 10000, i64 4)
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call void @llvm.memset.p0i8.i64(i8* %call, i8 0, i64 40000, i1 false)
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ret i8* %call
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}
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define i8* @volatile_zero_memset_after_calloc() {
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; CHECK-LABEL: @volatile_zero_memset_after_calloc(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
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; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[CALL]], i8 0, i64 40000, i1 true)
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; CHECK-NEXT: ret i8* [[CALL]]
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;
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%call = tail call i8* @calloc(i64 10000, i64 4)
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call void @llvm.memset.p0i8.i64(i8* %call, i8 0, i64 40000, i1 true)
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ret i8* %call
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}
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define i8* @zero_memset_and_store_after_calloc(i8 %v) {
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; CHECK-LABEL: @zero_memset_and_store_after_calloc(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
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; CHECK-NEXT: ret i8* [[CALL]]
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;
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%call = tail call i8* @calloc(i64 10000, i64 4)
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store i8 %v, i8* %call
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call void @llvm.memset.p0i8.i64(i8* %call, i8 0, i64 40000, i1 false)
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ret i8* %call
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}
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define i8* @partial_zero_memset_after_calloc() {
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; CHECK-LABEL: @partial_zero_memset_after_calloc(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
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; CHECK-NEXT: ret i8* [[CALL]]
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;
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%call = tail call i8* @calloc(i64 10000, i64 4)
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call void @llvm.memset.p0i8.i64(i8* %call, i8 0, i64 20, i1 false)
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ret i8* %call
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}
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define i8* @partial_zero_memset_and_store_after_calloc(i8 %v) {
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; CHECK-LABEL: @partial_zero_memset_and_store_after_calloc(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 30
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; CHECK-NEXT: store i8 [[V:%.*]], i8* [[GEP]], align 1
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; CHECK-NEXT: ret i8* [[CALL]]
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;
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%call = tail call i8* @calloc(i64 10000, i64 4)
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%gep = getelementptr inbounds i8, i8* %call, i64 30
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store i8 %v, i8* %gep
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call void @llvm.memset.p0i8.i64(i8* %call, i8 0, i64 20, i1 false)
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ret i8* %call
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}
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define i8* @zero_memset_and_store_with_dyn_index_after_calloc(i8 %v, i64 %idx) {
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; CHECK-LABEL: @zero_memset_and_store_with_dyn_index_after_calloc(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
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; CHECK-NEXT: ret i8* [[CALL]]
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;
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%call = tail call i8* @calloc(i64 10000, i64 4)
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%gep = getelementptr inbounds i8, i8* %call, i64 %idx
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store i8 %v, i8* %gep
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call void @llvm.memset.p0i8.i64(i8* %call, i8 0, i64 40000, i1 false)
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ret i8* %call
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}
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define i8* @partial_zero_memset_and_store_with_dyn_index_after_calloc(i8 %v, i64 %idx) {
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; CHECK-LABEL: @partial_zero_memset_and_store_with_dyn_index_after_calloc(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 [[IDX:%.*]]
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; CHECK-NEXT: store i8 [[V:%.*]], i8* [[GEP]], align 1
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; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[CALL]], i8 0, i64 20, i1 false)
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; CHECK-NEXT: ret i8* [[CALL]]
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;
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%call = tail call i8* @calloc(i64 10000, i64 4)
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%gep = getelementptr inbounds i8, i8* %call, i64 %idx
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store i8 %v, i8* %gep
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call void @llvm.memset.p0i8.i64(i8* %call, i8 0, i64 20, i1 false)
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ret i8* %call
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}
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define i8* @zero_memset_after_calloc_inaccessiblememonly() {
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; CHECK-LABEL: @zero_memset_after_calloc_inaccessiblememonly(
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; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4) #[[ATTR6]]
|
|
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[CALL]], i8 0, i64 40000, i1 false)
|
|
; CHECK-NEXT: ret i8* [[CALL]]
|
|
;
|
|
%call = tail call i8* @calloc(i64 10000, i64 4) inaccessiblememonly
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|
call void @llvm.memset.p0i8.i64(i8* %call, i8 0, i64 40000, i1 false)
|
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ret i8* %call
|
|
}
|
|
|
|
define i8* @cst_nonzero_memset_after_calloc() {
|
|
; CHECK-LABEL: @cst_nonzero_memset_after_calloc(
|
|
; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
|
|
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[CALL]], i8 1, i64 40000, i1 false)
|
|
; CHECK-NEXT: ret i8* [[CALL]]
|
|
;
|
|
%call = tail call i8* @calloc(i64 10000, i64 4)
|
|
call void @llvm.memset.p0i8.i64(i8* %call, i8 1, i64 40000, i1 false)
|
|
ret i8* %call
|
|
}
|
|
|
|
define i8* @nonzero_memset_after_calloc(i8 %v) {
|
|
; CHECK-LABEL: @nonzero_memset_after_calloc(
|
|
; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
|
|
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* [[CALL]], i8 [[V:%.*]], i64 40000, i1 false)
|
|
; CHECK-NEXT: ret i8* [[CALL]]
|
|
;
|
|
%call = tail call i8* @calloc(i64 10000, i64 4)
|
|
call void @llvm.memset.p0i8.i64(i8* %call, i8 %v, i64 40000, i1 false)
|
|
ret i8* %call
|
|
}
|
|
|
|
; PR11896
|
|
; The first memset is dead, because calloc provides zero-filled memory.
|
|
; TODO: This could be replaced with a call to malloc + memset_pattern16.
|
|
define i8* @memset_pattern16_after_calloc(i8* %pat) {
|
|
; CHECK-LABEL: @memset_pattern16_after_calloc(
|
|
; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @calloc(i64 10000, i64 4)
|
|
; CHECK-NEXT: call void @memset_pattern16(i8* [[CALL]], i8* [[PAT:%.*]], i64 40000)
|
|
; CHECK-NEXT: ret i8* [[CALL]]
|
|
;
|
|
%call = tail call i8* @calloc(i64 10000, i64 4) #1
|
|
call void @llvm.memset.p0i8.i64(i8* align 4 %call, i8 0, i64 40000, i1 false)
|
|
call void @memset_pattern16(i8* %call, i8* %pat, i64 40000) #1
|
|
ret i8* %call
|
|
}
|